[llvm] r312734 - [CUDA] Added rudimentary support for CUDA-9 and sm_70.

[Artem Belevich via llvm-commits]

Author: tra
Date: Thu Sep  7 11:14:32 2017
New Revision: 312734

URL: http://llvm.org/viewvc/llvm-project?rev=312734&view=rev
Log:
[CUDA] Added rudimentary support for CUDA-9 and sm_70.

For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.

On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.

Differential Revision: https://reviews.llvm.org/D37576

Added:
    llvm/trunk/test/CodeGen/NVPTX/sm-version-70.ll
Modified:
    llvm/trunk/lib/Target/NVPTX/NVPTX.td

Modified: llvm/trunk/lib/Target/NVPTX/NVPTX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTX.td?rev=312734&r1=312733&r2=312734&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTX.td (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTX.td Thu Sep  7 11:14:32 2017
@@ -50,6 +50,8 @@ def SM61 : SubtargetFeature<"sm_61", "Sm
                              "Target SM 6.1">;
 def SM62 : SubtargetFeature<"sm_62", "SmVersion", "62",
                              "Target SM 6.2">;
+def SM70 : SubtargetFeature<"sm_70", "SmVersion", "70",
+                             "Target SM 7.0">;
 
 def SATOM : SubtargetFeature<"satom", "HasAtomScope", "true",
                              "Atomic operations with scope">;
@@ -67,6 +69,8 @@ def PTX43 : SubtargetFeature<"ptx43", "P
                              "Use PTX version 4.3">;
 def PTX50 : SubtargetFeature<"ptx50", "PTXVersion", "50",
                              "Use PTX version 5.0">;
+def PTX60 : SubtargetFeature<"ptx60", "PTXVersion", "60",
+                             "Use PTX version 6.0">;
 
 //===----------------------------------------------------------------------===//
 // NVPTX supported processors.
@@ -87,6 +91,7 @@ def : Proc<"sm_53", [SM53, PTX42]>;
 def : Proc<"sm_60", [SM60, PTX50, SATOM]>;
 def : Proc<"sm_61", [SM61, PTX50, SATOM]>;
 def : Proc<"sm_62", [SM62, PTX50, SATOM]>;
+def : Proc<"sm_70", [SM70, PTX60, SATOM]>;
 
 def NVPTXInstrInfo : InstrInfo {
 }

Added: llvm/trunk/test/CodeGen/NVPTX/sm-version-70.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/NVPTX/sm-version-70.ll?rev=312734&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/NVPTX/sm-version-70.ll (added)
+++ llvm/trunk/test/CodeGen/NVPTX/sm-version-70.ll Thu Sep  7 11:14:32 2017
@@ -0,0 +1,5 @@
+; RUN: llc < %s -march=nvptx -mcpu=sm_70 | FileCheck %s
+; RUN: llc < %s -march=nvptx64 -mcpu=sm_70 | FileCheck %s
+
+; CHECK: .version 6.0
+; CHECK: .target sm_70