[PATCH] D36960: [X86][LLVM]Expanding Supports lowerInterleavedLoad() in X86InterleavedAccess (VF{8|16|32} stride 3).
Zvi Rackover via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 03:50:12 PDT 2017
zvi added a comment.
Looks almost ready. Please update the test with the missing AVX512 RUN:
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Comment at: lib/Target/X86/X86InterleavedAccess.cpp:367
+ int VF = VT.getVectorNumElements() / std::max(VectorSize / 128, 1);
+ for (int i = 0, FirstGroupElement = 0, GroupSize = 0; i < 3; i++) {
+ GroupSize = std::ceil((VF - FirstGroupElement) / 3.0);
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No need to define GroupSize at loop scope. it can be moved to loop body.
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Comment at: lib/Target/X86/X86InterleavedAccess.cpp:389
+ SmallVectorImpl<uint32_t> &ShuffleMask,
+ bool AlignDirection = true, bool Unary=false) {
+
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Please check formatting: need spaces around the '='
https://reviews.llvm.org/D36960
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