[PATCH] D35014: [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs.

[Lama via Phabricator via llvm-commits]

lsaba added a comment.

In https://reviews.llvm.org/D35014#859838, @jbhateja wrote:

> @lamas, @reviewers, comments have been taken care. Let me know  if anything else.


The following ll code fails in CodeGen selection, please debug the issue:

  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
  target triple = "x86_64-unknown-linux-gnu"
  %struct.S1 = type { i32, i32 }
  ; Function Attrs: nounwind uwtable
  define fastcc void @func(i32 %end) unnamed_addr #0 {
  entry:
   br label %while.body
  while.body:                                       ; preds = %if.end, %entry
   %a = phi i32 [ %end, %entry ], [ undef, %if.end ]
   br i1 undef, label %if.then, label %if.else
  if.then:                                          ; preds = %while.body
   %dec = add nsw i32 %a, -1
   %idx1 = sext i32 %dec to i64
   %idx2 = getelementptr inbounds %struct.S1, %struct.S1* null, i64 %idx1
   %0 = bitcast %struct.S1* %idx2 to i64*
   store i64 0, i64* %0, align 4
   %1 = load [3 x float]*, [3 x float]** undef, align 8 
   %idx3 = getelementptr inbounds [3 x float], [3 x float]* %1, i64 %idx1, i64 0
   %2 = bitcast float* %idx3 to i32*
   %3 = load i32, i32* %2, align 4
   store i32 %3, i32* undef, align 4
   br label %if.end
  if.else:                                          ; preds = %while.body
   br label %if.end
  if.end:                                           ; preds = %if.else, %if.then
   br label %while.body
  }
  attributes #0 = { nounwind uwtable "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" }
  !llvm.module.flags = !{!0}
  !0 = !{i32 1, !"wchar_size", i32 4}


https://reviews.llvm.org/D35014