[PATCH] D37356: LiveIntervalAnalysis: Fix alias regunit reserved definition

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 1 11:12:48 PDT 2017


MatzeB added a comment.

Thanks for the review!

In https://reviews.llvm.org/D37356#858909, @kparzysz wrote:

> On a somewhat unrelated note---is it valid on AArch64 to reserve W1_W2 without reserving https://reviews.llvm.org/W1 and https://reviews.llvm.org/W2?  If so, it would lead to a situation where a reserved register does not contain any reserved units.  If not, it would require one or both of W0_W1 and W2_W3 to also be reserved.


Yes this is allowed. That is exactly the situation I worked on in r292871. A typical situation you see in GPU targets is one or two registers reserved as stackpointer or similar ABI purposes, requiring that we also reserve all the tuples involving that register (usually done with `markSuperRegs()` in the targets `getReservedRegs()`). However just because one register in the tuple is reserved doesn't necessarily mean the other registers (when seen independently of the tuple) are reserved. Hence the logic in here that only considers a register unit as reserved if the register unit root register and all the super registers are reserved. This is for the situation of super/sub registers!

It just turned out that for aliased registers (the only situation in which we have more than 1 register unit root) requiring all register unit roots to be reserved, in order for the register unit to be reserved wasn't too helpful in ARMs case, where the reserved register was sometimes used in ways that would be invalid for a non-reserved register. So we wouldn't be able to compute liveness for the special register unit that representing the alias.


Repository:
  rL LLVM

https://reviews.llvm.org/D37356





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