[llvm] r312285 - [X86] Don't pull carry through X86ISD::ADD carryin, -1 if we can't guranteed we're really using the carry flag from the add.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 1 09:41:55 PDT 2017
Test case added in r312335
~Craig
On Fri, Sep 1, 2017 at 9:37 AM, Topper, Craig via llvm-commits <
llvm-commits at lists.llvm.org> wrote:
> Probably forgot to 'git add' it. Sorry. I'll do it now.
>
> -----Original Message-----
> From: hwennborg at google.com [mailto:hwennborg at google.com] On Behalf Of
> Hans Wennborg
> Sent: Friday, September 01, 2017 9:31 AM
> To: Topper, Craig <craig.topper at intel.com>
> Cc: llvm-commits <llvm-commits at lists.llvm.org>
> Subject: Re: [llvm] r312285 - [X86] Don't pull carry through X86ISD::ADD
> carryin, -1 if we can't guranteed we're really using the carry flag from
> the add.
>
> Merged to 5.0 in r312333.
>
> Did you forget to commit the test case?
>
> On Thu, Aug 31, 2017 at 2:39 PM, Craig Topper via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
> > Author: ctopper
> > Date: Thu Aug 31 14:39:23 2017
> > New Revision: 312285
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=312285&view=rev
> > Log:
> > [X86] Don't pull carry through X86ISD::ADD carryin, -1 if we can't
> guranteed we're really using the carry flag from the add.
> >
> > Prior to this patch we had a DAG combine that tried to bypass an
> X86ISD::ADD with -1 being added to the carry flag of some previous
> operation. We would then pass the carry flag directly to user.
> >
> > But this is only safe if the user is looking for the carry flag and not
> the zero flag.
> >
> > So we need to only do this combine in a context where we know what flag
> the consumer is using.
> >
> > Fixes PR34381.
> >
> > Differential Revision: https://reviews.llvm.org/D37317
> >
> > Modified:
> > llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> >
> > Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/X86ISelLowering.cpp?rev=312285&r1=312284&r2=312285&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
> > +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Aug 31 14:39:23
> 2017
> > @@ -30939,11 +30939,40 @@ static bool checkBoolTestAndOrSetCCCombi
> > return true;
> > }
> >
> > +// When legalizing carry, we create carries via add X, -1
> > +// If that comes from an actual carry, via setcc, we use the
> > +// carry directly.
> > +static SDValue combineCarryThroughADD(SDValue EFLAGS) {
> > + if (EFLAGS.getOpcode() == X86ISD::ADD) {
> > + if (isAllOnesConstant(EFLAGS.getOperand(1))) {
> > + SDValue Carry = EFLAGS.getOperand(0);
> > + while (Carry.getOpcode() == ISD::TRUNCATE ||
> > + Carry.getOpcode() == ISD::ZERO_EXTEND ||
> > + Carry.getOpcode() == ISD::SIGN_EXTEND ||
> > + Carry.getOpcode() == ISD::ANY_EXTEND ||
> > + (Carry.getOpcode() == ISD::AND &&
> > + isOneConstant(Carry.getOperand(1))))
> > + Carry = Carry.getOperand(0);
> > + if (Carry.getOpcode() == X86ISD::SETCC ||
> > + Carry.getOpcode() == X86ISD::SETCC_CARRY) {
> > + if (Carry.getConstantOperandVal(0) == X86::COND_B)
> > + return Carry.getOperand(1);
> > + }
> > + }
> > + }
> > +
> > + return SDValue();
> > +}
> > +
> > /// Optimize an EFLAGS definition used according to the condition code
> \p CC
> > /// into a simpler EFLAGS value, potentially returning a new \p CC and
> replacing
> > /// uses of chain values.
> > static SDValue combineSetCCEFLAGS(SDValue EFLAGS, X86::CondCode &CC,
> > SelectionDAG &DAG) {
> > + if (CC == X86::COND_B)
> > + if (SDValue Flags = combineCarryThroughADD(EFLAGS))
> > + return Flags;
> > +
> > if (SDValue R = checkBoolTestSetCCCombine(EFLAGS, CC))
> > return R;
> > return combineSetCCAtomicArith(EFLAGS, CC, DAG);
> > @@ -34987,27 +35016,13 @@ static SDValue combineSIntToFP(SDNode *N
> > return SDValue();
> > }
> >
> > -// Optimize RES, EFLAGS = X86ISD::ADD LHS, RHS
> > -static SDValue combineX86ADD(SDNode *N, SelectionDAG &DAG,
> > - X86TargetLowering::DAGCombinerInfo &DCI) {
> > - // When legalizing carry, we create carries via add X, -1
> > - // If that comes from an actual carry, via setcc, we use the
> > - // carry directly.
> > - if (isAllOnesConstant(N->getOperand(1)) && N->hasAnyUseOfValue(1)) {
> > - SDValue Carry = N->getOperand(0);
> > - while (Carry.getOpcode() == ISD::TRUNCATE ||
> > - Carry.getOpcode() == ISD::ZERO_EXTEND ||
> > - Carry.getOpcode() == ISD::SIGN_EXTEND ||
> > - Carry.getOpcode() == ISD::ANY_EXTEND ||
> > - (Carry.getOpcode() == ISD::AND &&
> > - isOneConstant(Carry.getOperand(1))))
> > - Carry = Carry.getOperand(0);
> > -
> > - if (Carry.getOpcode() == X86ISD::SETCC ||
> > - Carry.getOpcode() == X86ISD::SETCC_CARRY) {
> > - if (Carry.getConstantOperandVal(0) == X86::COND_B)
> > - return DCI.CombineTo(N, SDValue(N, 0), Carry.getOperand(1));
> > - }
> > +static SDValue combineSBB(SDNode *N, SelectionDAG &DAG) {
> > + if (SDValue Flags = combineCarryThroughADD(N->getOperand(2))) {
> > + MVT VT = N->getSimpleValueType(0);
> > + SDVTList VTs = DAG.getVTList(VT, MVT::i32);
> > + return DAG.getNode(X86ISD::SBB, SDLoc(N), VTs,
> > + N->getOperand(0), N->getOperand(1),
> > + Flags);
> > }
> >
> > return SDValue();
> > @@ -35036,6 +35051,14 @@ static SDValue combineADC(SDNode *N, Sel
> > return DCI.CombineTo(N, Res1, CarryOut);
> > }
> >
> > + if (SDValue Flags = combineCarryThroughADD(N->getOperand(2))) {
> > + MVT VT = N->getSimpleValueType(0);
> > + SDVTList VTs = DAG.getVTList(VT, MVT::i32);
> > + return DAG.getNode(X86ISD::ADC, SDLoc(N), VTs,
> > + N->getOperand(0), N->getOperand(1),
> > + Flags);
> > + }
> > +
> > return SDValue();
> > }
> >
> > @@ -35721,7 +35744,7 @@ SDValue X86TargetLowering::PerformDAGCom
> > case X86ISD::CMOV: return combineCMov(N, DAG, DCI, Subtarget);
> > case ISD::ADD: return combineAdd(N, DAG, Subtarget);
> > case ISD::SUB: return combineSub(N, DAG, Subtarget);
> > - case X86ISD::ADD: return combineX86ADD(N, DAG, DCI);
> > + case X86ISD::SBB: return combineSBB(N, DAG);
> > case X86ISD::ADC: return combineADC(N, DAG, DCI);
> > case ISD::MUL: return combineMul(N, DAG, DCI, Subtarget);
> > case ISD::SHL:
> >
> >
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