[PATCH] D37356: LiveIntervalAnalysis: Fix alias regunit reserved definition

[Matthias Braun via Phabricator via llvm-commits]

MatzeB created this revision.
Herald added subscribers: kristof.beyls, javed.absar, mcrosier, aemerson.

A register in CodeGen can be marked as reserved: In that case we
consider the register always live and do not use (or rather ignore)
kill/dead/undef operand flags.

LiveIntervalAnalysis however tracks liveness per register unit (not per
register). We already needed adjustments for this in r292871 to deal
with super/sub registers. However I did not look at aliased register
there. Looking at ARM:

FPSCR (regunits FPSCR, FPSCR~FPSCR_NZCV) aliases with FPSCR_NZCV
(regunits FPSCR_NZCV, FPSCR~FPSCR_NZCV) hence they share a register unit
(FPSCR~FPSCR_NZCV) that represents the aliased parts of the registers.
This shared register unit was previously considered non-reserved,
however given that we uses of the reserved FPSCR potentially violate
some rules (like uses without defs) we should make FPSCR~FPSCR_NZCV
reserved too and stop tracking liveness for it.

This patch:

- Defines a register unit as reserved when: At least for one root register, the root register and all its super registers are reserved.
- Adjust LiveIntervals::computeRegUnitRange() for new reserved definition.
- Add MachineRegisterInfo::isReservedRegUnit() to have a canonical way of testing.
- Stop computing LiveRanges for reserved register units in HMEditor even with UpdateFlags enabled.
- Skip verification of uses of reserved reg units in the machine verifier (this usually didn't happen because there would be no cached liverange but there is no guarantee for that and I would run into this case before the HMEditor tweak, so may as well fix the verifier too).

Note that this should only affect ARMs FPSCR/FPSCR_NZCV registers today;
aliased registers are rarely used, the only other cases are hexagons
P0-P3/P3_0 and C8/USR pairs which are not mixing reserved/non-reserved
registers in an alias.


Repository:
  rL LLVM

https://reviews.llvm.org/D37356

Files:
  include/llvm/CodeGen/MachineRegisterInfo.h
  lib/CodeGen/LiveIntervalAnalysis.cpp
  lib/CodeGen/MachineRegisterInfo.cpp
  lib/CodeGen/MachineVerifier.cpp
  test/CodeGen/ARM/no-fpscr-liveness.ll

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