[PATCH] D37250: [X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL312099: [X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well (authored by ctopper).

Changed prior to commit:
  https://reviews.llvm.org/D37250?vs=113022&id=113196#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D37250

Files:
  llvm/trunk/lib/Target/X86/X86.td
  llvm/trunk/test/CodeGen/X86/misched-fusion.ll
  llvm/trunk/test/CodeGen/X86/rdrand.ll


Index: llvm/trunk/lib/Target/X86/X86.td
===================================================================
--- llvm/trunk/lib/Target/X86/X86.td
+++ llvm/trunk/lib/Target/X86/X86.td
@@ -528,6 +528,7 @@
   FeatureSlow3OpsLEA,
   FeatureFastScalarFSQRT,
   FeatureFastSHLDRotate,
+  FeatureSlowIncDec,
   FeatureMacroFusion
 ]>;
 
@@ -560,8 +561,7 @@
   FeatureERMSB,
   FeatureFMA,
   FeatureLZCNT,
-  FeatureMOVBE,
-  FeatureSlowIncDec
+  FeatureMOVBE
 ]>;
 
 class HaswellProc<string Name> : ProcModel<Name, HaswellModel,
Index: llvm/trunk/test/CodeGen/X86/misched-fusion.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/misched-fusion.ll
+++ llvm/trunk/test/CodeGen/X86/misched-fusion.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=-slow-incdec -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
 
 ; Verify that TEST+JE are scheduled together.
 ; CHECK: test_je
Index: llvm/trunk/test/CodeGen/X86/rdrand.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand.ll
+++ llvm/trunk/test/CodeGen/X86/rdrand.ll
@@ -93,7 +93,7 @@
 ; X86-NEXT:    rdrandl %edx
 ; X86-NEXT:    movl %edx, (%ecx)
 ; X86-NEXT:    leal 4(%ecx), %ecx
-; X86-NEXT:    decl %eax
+; X86-NEXT:    addl $-1, %eax
 ; X86-NEXT:    jne .LBB3_2
 ; X86-NEXT:  .LBB3_3: # %while.end
 ; X86-NEXT:    retl
@@ -108,7 +108,7 @@
 ; X64-NEXT:    rdrandl %eax
 ; X64-NEXT:    movl %eax, (%rdi)
 ; X64-NEXT:    leaq 4(%rdi), %rdi
-; X64-NEXT:    decl %esi
+; X64-NEXT:    addl $-1, %esi
 ; X64-NEXT:    jne .LBB3_1
 ; X64-NEXT:  .LBB3_2: # %while.end
 ; X64-NEXT:    retq


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