[llvm] r312096 - AMDGPU: Don't look for DS merge candidates with one use address

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 29 20:26:18 PDT 2017


Author: arsenm
Date: Tue Aug 29 20:26:18 2017
New Revision: 312096

URL: http://llvm.org/viewvc/llvm-project?rev=312096&view=rev
Log:
AMDGPU: Don't look for DS merge candidates with one use address

The merge is only possible if the base address register is the
same for the two instructions. If there is only the one use,
there's no point in doing an expensive forward scan checking
for memory interference looking for a merge candidate.

This gives a signficant improvement in one extreme testcase.
The code to do the scan is still algorithmically terrible,
so this is still the slowest pass in that example.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp?rev=312096&r1=312095&r2=312096&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp Tue Aug 29 20:26:18 2017
@@ -251,6 +251,16 @@ bool SILoadStoreOptimizer::offsetsCanBeC
 bool SILoadStoreOptimizer::findMatchingDSInst(CombineInfo &CI) {
   MachineBasicBlock::iterator E = CI.I->getParent()->end();
   MachineBasicBlock::iterator MBBI = CI.I;
+
+  int AddrIdx = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(),
+                                           AMDGPU::OpName::addr);
+  const MachineOperand &AddrReg0 = CI.I->getOperand(AddrIdx);
+
+  // We only ever merge operations with the same base address register, so don't
+  // bother scanning forward if there are no other uses.
+  if (MRI->hasOneNonDBGUse(AddrReg0.getReg()))
+    return false;
+
   ++MBBI;
 
   SmallVector<const MachineOperand *, 8> DefsToMove;
@@ -300,9 +310,6 @@ bool SILoadStoreOptimizer::findMatchingD
     if (addToListsIfDependent(*MBBI, DefsToMove, CI.InstsToMove))
       continue;
 
-    int AddrIdx = AMDGPU::getNamedOperandIdx(CI.I->getOpcode(),
-                                             AMDGPU::OpName::addr);
-    const MachineOperand &AddrReg0 = CI.I->getOperand(AddrIdx);
     const MachineOperand &AddrReg1 = MBBI->getOperand(AddrIdx);
 
     // Check same base pointer. Be careful of subregisters, which can occur with




More information about the llvm-commits mailing list