[PATCH] D37280: [X86] Provide a separate feature bit for macro fusion support instead of basing it on the AVX flag

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc added a comment.

A quick skim of Agner's suggsets that all of Core2, Nehalem, Westmere, Bulldozer, Piledriver, Steamroler, and Zen all do nearly full blown macro fusion for cmp/test and a branch. Even the Via Nana apparently does some of this apparently....

I don't think we should restrict it to SNB. I think we should default it on everywhere we don't have explicit information that it doesn't occur (Silvermont, KNL, Athlon, etc)

Anyways, several of the AMD chips listed support AVX and so this would be a regression there.


https://reviews.llvm.org/D37280