[PATCH] D37250: [X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well

[Chandler Carruth via Phabricator via llvm-commits]

chandlerc added a comment.

In https://reviews.llvm.org/D37250#855662, @craig.topper wrote:

> I think Pentium 4 and Silvermont read the old CF value and pass it through the INC/DEC instruction.
>
> I think the "core" line prior to Sandy Bridge any instruction that reads the CF flag after INC/DEC experienced a stall until the INC/DEC instruction retired.
>
> I think from Sandy Bridge onward, it is no longer a stall until retirement, but an instruction that reads the CF flag after INC/DEC become dependent on the last writer of CF before the INC/DEC.


Is it only an instruction that reads the *CF* flag?

Because if so, then we might want to drop this entirely... If an instruction read the CF flag after INC/DEC, either some other instruction def'ed the flag for that read killing the dependency, it is *trying* to read CF from a previous instruction in a fit of cleverness, or it is just buggy code... In any case, the dependency doesn't seem like a problem?

(Or maybe we get "false" dependencies because of how this is implemented inside the chip?)


https://reviews.llvm.org/D37250