[PATCH] D37250: [X86] Apply SlowIncDec feature to Sandybridge/Ivybridge CPUs as well

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.

Currently we start applying this on Haswell and newer. I don't believe anything changed in the Haswell architecture to make this the right cutoff point. The partial flag handling around this has been roughly the same since Sandybridge.

gcc seems to disable inc/dec all the way back to at least core2. We could do the same if we want.


https://reviews.llvm.org/D37250

Files:
  lib/Target/X86/X86.td
  test/CodeGen/X86/misched-fusion.ll
  test/CodeGen/X86/rdrand.ll


Index: test/CodeGen/X86/rdrand.ll
===================================================================
--- test/CodeGen/X86/rdrand.ll
+++ test/CodeGen/X86/rdrand.ll
@@ -93,7 +93,7 @@
 ; X86-NEXT:    rdrandl %edx
 ; X86-NEXT:    movl %edx, (%ecx)
 ; X86-NEXT:    leal 4(%ecx), %ecx
-; X86-NEXT:    decl %eax
+; X86-NEXT:    addl $-1, %eax
 ; X86-NEXT:    jne .LBB3_2
 ; X86-NEXT:  .LBB3_3: # %while.end
 ; X86-NEXT:    retl
@@ -108,7 +108,7 @@
 ; X64-NEXT:    rdrandl %eax
 ; X64-NEXT:    movl %eax, (%rdi)
 ; X64-NEXT:    leaq 4(%rdi), %rdi
-; X64-NEXT:    decl %esi
+; X64-NEXT:    addl $-1, %esi
 ; X64-NEXT:    jne .LBB3_1
 ; X64-NEXT:  .LBB3_2: # %while.end
 ; X64-NEXT:    retq
Index: test/CodeGen/X86/misched-fusion.ll
===================================================================
--- test/CodeGen/X86/misched-fusion.ll
+++ test/CodeGen/X86/misched-fusion.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -mattr=avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
 
 ; Verify that TEST+JE are scheduled together.
 ; CHECK: test_je
Index: lib/Target/X86/X86.td
===================================================================
--- lib/Target/X86/X86.td
+++ lib/Target/X86/X86.td
@@ -516,7 +516,8 @@
   FeatureLAHFSAHF,
   FeatureSlow3OpsLEA,
   FeatureFastScalarFSQRT,
-  FeatureFastSHLDRotate
+  FeatureFastSHLDRotate,
+  FeatureSlowIncDec
 ]>;
 
 class SandyBridgeProc<string Name> : ProcModel<Name, SandyBridgeModel,
@@ -548,8 +549,7 @@
   FeatureERMSB,
   FeatureFMA,
   FeatureLZCNT,
-  FeatureMOVBE,
-  FeatureSlowIncDec
+  FeatureMOVBE
 ]>;
 
 class HaswellProc<string Name> : ProcModel<Name, HaswellModel,


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