[PATCH] D37139: [x86] Extend the manual ISel of `add` and `sub` with both RMW memory operands and used flags to support matching immediate operands.

Chandler Carruth via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 25 05:42:10 PDT 2017


chandlerc updated this revision to Diff 112682.
chandlerc added a comment.

Switch to a more verbose (more lines of code) pattern for selecting opcodes in
the ADD and SUB block. This will become more important when adding AND, OR, and
XOR which all want the same behavior.

Still, suggestions for better ways to handle this are welcome. This is kind of
a lesson in why tablegen patterns are better.


https://reviews.llvm.org/D37139

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  test/CodeGen/X86/add.ll
  test/CodeGen/X86/fold-rmw-ops.ll
  test/CodeGen/X86/peephole-na-phys-copy-folding.ll
  test/CodeGen/X86/pr32659.ll

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