[PATCH] D37102: [AArch64] Add FMOVH0: materialize 0 using zero register for f16 values

[Oliver Stannard via Phabricator via llvm-commits]

olista01 added inline comments.


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Comment at: lib/Target/AArch64/AArch64AsmPrinter.cpp:504
     // Convert S/D register to corresponding Q register
-    if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) {
+    if (AArch64::H0 <= DestReg && DestReg <= AArch64::H31)
+      DestReg = AArch64::Q0 + (DestReg - AArch64::H0);
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This code path is not tested.


https://reviews.llvm.org/D37102