[llvm] r311253 - [X86] Remove an unnecessary alignment restriction from MOVDDUP pattern.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sat Aug 19 11:02:28 2017
New Revision: 311253

URL: http://llvm.org/viewvc/llvm-project?rev=311253&view=rev
Log:
[X86] Remove an unnecessary alignment restriction from MOVDDUP pattern.

The SSE MOVDDUP instruction only loads 64-bits with no alignment restriction.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=311253&r1=311252&r2=311253&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Sat Aug 19 11:02:28 2017
@@ -5048,7 +5048,8 @@ def : Pat<(v2i64 (X86VBroadcast (loadi64
           (VMOVDDUPrm addr:$src)>;
 
 let Predicates = [UseSSE3] in {
-  def : Pat<(X86Movddup (memopv2f64 addr:$src)),
+  // No need for aligned memory as this only loads 64-bits.
+  def : Pat<(X86Movddup (loadv2f64 addr:$src)),
             (MOVDDUPrm addr:$src)>;
 }