[llvm] r310996 - [GlobalISel][X86] Fix mir tests, use correct physical register.NFC.

[Igor Breger via llvm-commits]

Author: ibreger
Date: Wed Aug 16 00:25:51 2017
New Revision: 310996

URL: http://llvm.org/viewvc/llvm-project?rev=310996&view=rev
Log:
[GlobalISel][X86] Fix mir tests, use correct physical register.NFC.

Modified:
    llvm/trunk/test/CodeGen/X86/GlobalISel/select-GV.mir
    llvm/trunk/test/CodeGen/X86/GlobalISel/select-add.mir
    llvm/trunk/test/CodeGen/X86/GlobalISel/select-sub.mir

Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/select-GV.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/select-GV.mir?rev=310996&r1=310995&r2=310996&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/select-GV.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-GV.mir Wed Aug 16 00:25:51 2017
@@ -7,9 +7,10 @@
 
   @g_int = global i32 0, align 4
 
-  define i32* @test_global_ptrv() {
+  define void @test_global_ptrv() {
   entry:
-    ret i32* @g_int
+    store i32* @g_int, i32** undef
+    ret void
   }
 
   define i32 @test_global_valv() {
@@ -27,31 +28,45 @@ legalized:       true
 regBankSelected: true
 # X64ALL:              registers:
 # X64ALL-NEXT:           - { id: 0, class: gr64, preferred-register: '' }
+# X64ALL-NEXT:           - { id: 1, class: gr64, preferred-register: '' }
 #
-# X32ALL:              registers:
-# X32ALL-NEXT:           - { id: 0, class: gr32, preferred-register: '' }
+# X32:                 registers:
+# X32-NEXT:              - { id: 0, class: gr32, preferred-register: '' }
+# X32-NEXT:              - { id: 1, class: gr32, preferred-register: '' }
+#
+# X32ABI:              registers:
+# X32ABI-NEXT:           - { id: 0, class: low32_addr_access, preferred-register: '' }
+# X32ABI-NEXT:           - { id: 1, class: gr32, preferred-register: '' }
 registers:
   - { id: 0, class: gpr, preferred-register: '' }
-# X64:                     %0 = LEA64r _, 1, _, @g_int, _
-# X64-NEXT:                %rax = COPY %0
-# X64-NEXT:                RET 0, implicit %rax
+  - { id: 1, class: gpr, preferred-register: '' }
+# X64:                     %0 = IMPLICIT_DEF
+# X64-NEXT:                %1 = LEA64r _, 1, _, @g_int, _
+# X64-NEXT:                MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
+# X64-NEXT:                RET 0
 #
-# X64_DARWIN_PIC:          %0 = LEA64r %rip, 1, _, @g_int, _
-# X64_DARWIN_PIC-NEXT:     %rax = COPY %0
-# X64_DARWIN_PIC-NEXT:     RET 0, implicit %rax
+# X64_DARWIN_PIC:          %0 = IMPLICIT_DEF
+# X64_DARWIN_PIC-NEXT:     %1 = LEA64r %rip, 1, _, @g_int, _
+# X64_DARWIN_PIC-NEXT:     MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
+# X64_DARWIN_PIC-NEXT:     RET 0
 #
-# X32:                     %0 = LEA32r _, 1, _, @g_int, _
-# X32-NEXT:                %rax = COPY %0
-# X32-NEXT:                RET 0, implicit %rax
+# X32:                     %0 = IMPLICIT_DEF
+# X32-NEXT:                %1 = LEA32r _, 1, _, @g_int, _
+# X32-NEXT:                MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
+# X32-NEXT:                RET 0
 #
-# X32ABI:                  %0 = LEA64_32r _, 1, _, @g_int, _
-# X32ABI-NEXT:             %rax = COPY %0
-# X32ABI-NEXT:             RET 0, implicit %rax
+# X32ABI:                  %0 = IMPLICIT_DEF
+# X32ABI-NEXT:             %1 = LEA64_32r _, 1, _, @g_int, _
+# X32ABI-NEXT:             MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
+# X32ABI-NEXT:             RET 0
 body:             |
   bb.1.entry:
-    %0(p0) = G_GLOBAL_VALUE @g_int
-    %rax = COPY %0(p0)
-    RET 0, implicit %rax
+    liveins: %rdi
+
+    %0(p0) = IMPLICIT_DEF
+    %1(p0) = G_GLOBAL_VALUE @g_int
+    G_STORE %1(p0), %0(p0) :: (store 8 into `i32** undef`)
+    RET 0
 
 ...
 ---

Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/select-add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/select-add.mir?rev=310996&r1=310995&r2=310996&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/select-add.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-add.mir Wed Aug 16 00:25:51 2017
@@ -85,7 +85,7 @@ body:             |
     %0(s32) = COPY %edi
     %1(s32) = COPY %esi
     %2(s32) = G_ADD %0, %1
-    %rax = COPY %2(s32)
+    %eax = COPY %2(s32)
 
 ...
 ---

Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/select-sub.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/select-sub.mir?rev=310996&r1=310995&r2=310996&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/select-sub.mir (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/select-sub.mir Wed Aug 16 00:25:51 2017
@@ -73,7 +73,7 @@ body:             |
     %0(s32) = COPY %edi
     %1(s32) = COPY %esi
     %2(s32) = G_SUB %0, %1
-    %rax = COPY %2(s32)
+    %eax = COPY %2(s32)
 
 ...
 ---