[PATCH] D35816: [Greedy RegAlloc] Add logic to greedy reg alloc to avoid bad eviction chains

[Marina Yatsina via Phabricator via llvm-commits]

myatsina added a comment.

In https://reviews.llvm.org/D35816#841290, @qcolombet wrote:

> > Based on this I think the solution should probably be kept in Greedy (+ possibly additional cleanup in the copy propagation pass).
>
> Would a super block copy propagation pass work?
>  I believe the code in that pass should just work in such configuration.


When you say "super blocks" do you refer to restructuring the CFG (using tail duplication) and making the common path linear so that it can be combined into one large basic block?
I haven't really seen this concept in llvm (except for some "SuperBlock" in debug info, which seems to be unrelated), so if you have some references for me that would be great.

If we're talking about somehow flattening and "ordering" the BB, control flow and loops and and scanning them looking for cross block chains, then I don't think it's something trivial.
It's not always legal to replace such chains (if someone uses or clobbers one of the registers in the middle of the chain I can no longer do the replacement).
Here's one example, I cannot do the replacement "xmm0 = copy xmm3" + "xmm3 =copy xmm0" because if I reach bb2 from bb1 then xmm0 is part of the copy chain, but if I reach bb2 from bb3, then it is not.

bb1:
xmm0 = copy xmm1
// fall through bb2

bb2:
xmm1 = copy xmm2
xmm2 = copy xmm3
...
xmm3 = copy xmm2
xmm2 = copy xmm1
xmm1 = copy xmm0
test
je bb3

bb3:
xmm0 = /* something */
test
je bb2

In order to properly identify this I need to do liveness analysis for each reg suspected to be in the copy chain. I need to check if any clobbering (or even use of an "intermediate" value) might reach one of the BBs the chain is spread across - if so, I cannot do replacement.

- Also, I may have several suspected chains in parallel which complicates it even more.

Please let me know if I understood correctly the "super block copy propagation".

Thanks,
Marina


Repository:
  rL LLVM

https://reviews.llvm.org/D35816