[PATCH] D36679: [InstCombine] Added support for: trunc(ashr(mul(sext(...), sext(...))) -> ashr(mul(...))

[Amjad Aboud via Phabricator via llvm-commits]

aaboud created this revision.

Added support for the following case:

define i16 @test6_ashr_mul(i8 %X, i8 %Y) {
; CHECK-LABEL: @test6_ashr_mul(
; CHECK-NEXT:    [[A:%.*]] = sext i8 %X to i16
; CHECK-NEXT:    [[B:%.*]] = sext i8 %Y to i16
; CHECK-NEXT:    [[C:%.*]] = mul nsw i16 [[A]], [[B]]
; CHECK-NEXT:    [[D:%.*]] = ashr i16 %C, 15
; CHECK-NEXT:    ret i16 %D

  %A = sext i8 %X to i32
  %B = sext i8 %Y to i32
  %C = mul i32 %A, %B
  %D = ashr i32 %C, 15
  %E = trunc i32 %D to i16
  ret i16 %E

}

So far, InstCombine handled only LShr instruction and tried to replace AShr instruction with the LShr when applicable.
However, there are cases where LShr has no advantage over AShr, especially when the higher bits are not known to be zero, but are known to be equal to the sign bit.

Note: There is more to do to catch all the cases where AShr can be optimized, but we end up having LShr instead, e.g., we could replace LShr with AShr when applicable. However, the current implementation of InstCombine will probably lead into infinite loop if we try implement both transform direction (i.e., LShr->AShr and AShr->LShr).


https://reviews.llvm.org/D36679

Files:
  lib/Analysis/ValueTracking.cpp
  lib/Transforms/InstCombine/InstCombineCasts.cpp
  lib/Transforms/InstCombine/InstCombineShifts.cpp
  lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
  test/Transforms/InstCombine/shift.ll
  test/Transforms/InstCombine/trunc.ll

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