[PATCH] D36650: [X86] WIP support narrowing operations when only a subvector is demanded

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: lib/Target/X86/X86ISelLowering.cpp:35535
+    }
+  }
+
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Should this be in DAGCombiner protected with a isExtractSubvectorCheap call?


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Comment at: lib/Target/X86/X86ISelLowering.cpp:35587
+    auto *Idx2 = dyn_cast<ConstantSDNode>(SubVec.getOperand(2));
+    if (Idx2 && Idx2->getZExtValue() == 0) {
+      return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, Vec,
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Minor observation, we're assuming constant index above (IdxVal), but here we're checking for it.


https://reviews.llvm.org/D36650