[llvm] r310601 - [Hexagon] Use isMetaInstruction instead of isDebugValue

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Thu Aug 10 08:00:30 2017
New Revision: 310601

URL: http://llvm.org/viewvc/llvm-project?rev=310601&view=rev
Log:
[Hexagon] Use isMetaInstruction instead of isDebugValue

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
    llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp?rev=310601&r1=310600&r2=310601&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp Thu Aug 10 08:00:30 2017
@@ -253,7 +253,8 @@ static bool isUnsafeToMoveAcross(Machine
                                  const TargetRegisterInfo *TRI) {
   return (UseReg && (MI.modifiesRegister(UseReg, TRI))) ||
          MI.modifiesRegister(DestReg, TRI) || MI.readsRegister(DestReg, TRI) ||
-         MI.hasUnmodeledSideEffects() || MI.isInlineAsm() || MI.isDebugValue();
+         MI.hasUnmodeledSideEffects() || MI.isInlineAsm() ||
+         MI.isMetaInstruction();
 }
 
 static unsigned UseReg(const MachineOperand& MO) {

Modified: llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp?rev=310601&r1=310600&r2=310601&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp Thu Aug 10 08:00:30 2017
@@ -539,7 +539,7 @@ bool HexagonEarlyIfConversion::isProfita
       return 0u;
     unsigned T = std::count_if(B->begin(), B->getFirstTerminator(),
                                [](const MachineInstr &MI) {
-                                 return !MI.isDebugValue();
+                                 return !MI.isMetaInstruction();
                                });
     if (T < HEXAGON_PACKET_SIZE)
       Spare += HEXAGON_PACKET_SIZE-T;

Modified: llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp?rev=310601&r1=310600&r2=310601&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonFixupHwLoops.cpp Thu Aug 10 08:00:30 2017
@@ -138,7 +138,7 @@ bool HexagonFixupHwLoops::fixupLoopInstr
     MachineBasicBlock::iterator MIE = MBB.end();
     while (MII != MIE) {
       InstOffset += HII->getSize(*MII);
-      if (MII->isDebugValue()) {
+      if (MII->isMetaInstruction()) {
         ++MII;
         continue;
       }