[llvm] r310066 - [AArch64] Fix an assertion for pre-index generation with unscaled loads/stores.
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 16:54:21 PDT 2017
Tim: Ping?
On Sun, Aug 6, 2017 at 11:05 AM, Chad Rosier <mcrosier at codeaurora.org> wrote:
> Tim,
>
> Any objection to merging this into the 5.0.0 branch? This addresses
> PR34035.
>
> Chad
>
>
>
> On 8/4/2017 12:44 PM, Chad Rosier via llvm-commits wrote:
>>
>> Author: mcrosier
>> Date: Fri Aug 4 09:44:06 2017
>> New Revision: 310066
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=310066&view=rev
>> Log:
>> [AArch64] Fix an assertion for pre-index generation with unscaled
>> loads/stores.
>>
>> Differential Revision: https://reviews.llvm.org/D36248
>> PR34035
>>
>> Added:
>> llvm/trunk/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir
>> Modified:
>> llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp?rev=310066&r1=310065&r2=310066&view=diff
>>
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp Fri Aug 4
>> 09:44:06 2017
>> @@ -388,6 +388,10 @@ static unsigned isMatchingStore(MachineI
>> }
>> static unsigned getPreIndexedOpcode(unsigned Opc) {
>> + // FIXME: We don't currently support creating pre-indexed loads/stores
>> when
>> + // the load or store is the unscaled version. If we decide to perform
>> such an
>> + // optimization in the future the cases for the unscaled loads/stores
>> will
>> + // need to be added here.
>> switch (Opc) {
>> default:
>> llvm_unreachable("Opcode has no pre-indexed equivalent!");
>> @@ -451,32 +455,42 @@ static unsigned getPostIndexedOpcode(uns
>> default:
>> llvm_unreachable("Opcode has no post-indexed wise equivalent!");
>> case AArch64::STRSui:
>> + case AArch64::STURSi:
>> return AArch64::STRSpost;
>> case AArch64::STRDui:
>> + case AArch64::STURDi:
>> return AArch64::STRDpost;
>> case AArch64::STRQui:
>> + case AArch64::STURQi:
>> return AArch64::STRQpost;
>> case AArch64::STRBBui:
>> return AArch64::STRBBpost;
>> case AArch64::STRHHui:
>> return AArch64::STRHHpost;
>> case AArch64::STRWui:
>> + case AArch64::STURWi:
>> return AArch64::STRWpost;
>> case AArch64::STRXui:
>> + case AArch64::STURXi:
>> return AArch64::STRXpost;
>> case AArch64::LDRSui:
>> + case AArch64::LDURSi:
>> return AArch64::LDRSpost;
>> case AArch64::LDRDui:
>> + case AArch64::LDURDi:
>> return AArch64::LDRDpost;
>> case AArch64::LDRQui:
>> + case AArch64::LDURQi:
>> return AArch64::LDRQpost;
>> case AArch64::LDRBBui:
>> return AArch64::LDRBBpost;
>> case AArch64::LDRHHui:
>> return AArch64::LDRHHpost;
>> case AArch64::LDRWui:
>> + case AArch64::LDURWi:
>> return AArch64::LDRWpost;
>> case AArch64::LDRXui:
>> + case AArch64::LDURXi:
>> return AArch64::LDRXpost;
>> case AArch64::LDRSWui:
>> return AArch64::LDRSWpost;
>> @@ -1694,8 +1708,9 @@ bool AArch64LoadStoreOpt::optimizeBlock(
>> ++NumPostFolded;
>> break;
>> }
>> - // Don't know how to handle pre/post-index versions, so move to the
>> next
>> - // instruction.
>> +
>> + // Don't know how to handle unscaled pre/post-index versions below,
>> so
>> + // move to the next instruction.
>> if (TII->isUnscaledLdSt(Opc)) {
>> ++MBBI;
>> break;
>>
>> Added: llvm/trunk/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir
>> URL:
>> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir?rev=310066&view=auto
>>
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir
>> (added)
>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-post.mir Fri
>> Aug 4 09:44:06 2017
>> @@ -0,0 +1,115 @@
>> +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt
>> -verify-machineinstrs -o - %s | FileCheck %s
>> +---
>> +# CHECK-LABEL: name: test_LDURSi_post
>> +# CHECK: LDRSpost %x0, -4
>> +name: test_LDURSi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %s0 = LDURSi %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_LDURDi_post
>> +# CHECK: LDRDpost %x0, -4
>> +name: test_LDURDi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %d0 = LDURDi %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_LDURQi_post
>> +# CHECK: LDRQpost %x0, -4
>> +name: test_LDURQi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %q0 = LDURQi %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_LDURWi_post
>> +# CHECK: LDRWpost %x0, -4
>> +name: test_LDURWi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %w1 = LDURWi %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_LDURXi_post
>> +# CHECK: %x1 = LDRXpost %x0, -4
>> +name: test_LDURXi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %x1 = LDURXi %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_STURSi_post
>> +# CHECK: STRSpost %s0, %x0, -4
>> +name: test_STURSi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %s0 = FMOVS0
>> + STURSi %s0, %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_STURDi_post
>> +# CHECK: STRDpost %d0, %x0, -4
>> +name: test_STURDi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %d0 = FMOVD0
>> + STURDi %d0, %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_STURQi_post
>> +# CHECK: STRQpost %q0, %x0, -4
>> +name: test_STURQi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + %q0 = MOVIv4i32 0, 0
>> + STURQi %q0, %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_STURWi_post
>> +# CHECK: STRWpost %wzr, %x0, -4
>> +name: test_STURWi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + STURWi %wzr, %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>> +# CHECK-LABEL: name: test_STURXi_post
>> +# CHECK: STRXpost %xzr, %x0, -4
>> +name: test_STURXi_post
>> +body: |
>> + bb.0.entry:
>> + liveins: %x0
>> +
>> + STURXi %xzr, %x0, 0
>> + %x0 = SUBXri %x0, 4, 0
>> + RET_ReallyLR implicit %x0
>> +...
>>
>>
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