[llvm] r310463 - [LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 9 04:28:01 PDT 2017
Author: jonpa
Date: Wed Aug 9 04:28:01 2017
New Revision: 310463
URL: http://llvm.org/viewvc/llvm-project?rev=310463&view=rev
Log:
[LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()
isLegalAddressingMode() has recently gained the extra optional Instruction*
parameter, and therefore it can now do the job that previously only
isFoldableMemAccess() could do.
The SystemZ implementation of isLegalAddressingMode() has gained the
functionality of checking for offsets, which used to be done with
isFoldableMemAccess().
The isFoldableMemAccess() hook has been removed everywhere.
Review: Quentin Colombet, Ulrich Weigand
https://reviews.llvm.org/D35933
Modified:
llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/Analysis/TargetTransformInfo.cpp
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/trunk/test/CodeGen/Hexagon/swp-const-tc.ll
Modified: llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h Wed Aug 9 04:28:01 2017
@@ -461,12 +461,6 @@ public:
/// immediate offset and no index register.
bool LSRWithInstrQueries() const;
- /// \brief Return true if target supports the load / store
- /// instruction with the given Offset on the form reg + Offset. It
- /// may be that Offset is too big for a certain type (register
- /// class).
- bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const;
-
/// \brief Return true if it's free to truncate a value of type Ty1 to type
/// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
/// by referencing its sub-register AX.
@@ -904,7 +898,6 @@ public:
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale, unsigned AddrSpace) = 0;
virtual bool LSRWithInstrQueries() = 0;
- virtual bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) = 0;
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
virtual bool isProfitableToHoist(Instruction *I) = 0;
virtual bool isTypeLegal(Type *Ty) = 0;
@@ -1129,9 +1122,6 @@ public:
bool LSRWithInstrQueries() override {
return Impl.LSRWithInstrQueries();
}
- bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) override {
- return Impl.isFoldableMemAccessOffset(I, Offset);
- }
bool isTruncateFree(Type *Ty1, Type *Ty2) override {
return Impl.isTruncateFree(Ty1, Ty2);
}
Modified: llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h (original)
+++ llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h Wed Aug 9 04:28:01 2017
@@ -264,8 +264,6 @@ public:
bool LSRWithInstrQueries() { return false; }
- bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) { return true; }
-
bool isTruncateFree(Type *Ty1, Type *Ty2) { return false; }
bool isProfitableToHoist(Instruction *I) { return true; }
Modified: llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h (original)
+++ llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h Wed Aug 9 04:28:01 2017
@@ -133,10 +133,6 @@ public:
return getTLI()->getScalingFactorCost(DL, AM, Ty, AddrSpace);
}
- bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) {
- return getTLI()->isFoldableMemAccessOffset(I, Offset);
- }
-
bool isTruncateFree(Type *Ty1, Type *Ty2) {
return getTLI()->isTruncateFree(Ty1, Ty2);
}
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Wed Aug 9 04:28:01 2017
@@ -1904,10 +1904,6 @@ public:
return -1;
}
- virtual bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const {
- return true;
- }
-
/// Return true if the specified immediate is legal icmp immediate, that is
/// the target has icmp instructions which can compare a register against the
/// immediate without having to materialize the immediate into a register.
Modified: llvm/trunk/lib/Analysis/TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TargetTransformInfo.cpp?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/TargetTransformInfo.cpp Wed Aug 9 04:28:01 2017
@@ -189,11 +189,6 @@ bool TargetTransformInfo::LSRWithInstrQu
return TTIImpl->LSRWithInstrQueries();
}
-bool TargetTransformInfo::isFoldableMemAccessOffset(Instruction *I,
- int64_t Offset) const {
- return TTIImpl->isFoldableMemAccessOffset(I, Offset);
-}
-
bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
return TTIImpl->isTruncateFree(Ty1, Ty2);
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Wed Aug 9 04:28:01 2017
@@ -688,11 +688,8 @@ supportedAddressingMode(Instruction *I,
return AddressingMode(true/*LongDispl*/, true/*IdxReg*/);
}
-// TODO: This method should also check for the displacement when *I is
-// passed. It may also be possible to merge with isFoldableMemAccessOffset()
-// now that both methods get the *I.
bool SystemZTargetLowering::isLegalAddressingMode(const DataLayout &DL,
- const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const {
+ const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const {
// Punt on globals for now, although they can be used in limited
// RELATIVE LONG cases.
if (AM.BaseGV)
@@ -702,8 +699,14 @@ bool SystemZTargetLowering::isLegalAddre
if (!isInt<20>(AM.BaseOffs))
return false;
- if (I != nullptr &&
- !supportedAddressingMode(I, Subtarget.hasVector()).IndexReg)
+ AddressingMode SupportedAM(true, true);
+ if (I != nullptr)
+ SupportedAM = supportedAddressingMode(I, Subtarget.hasVector());
+
+ if (!SupportedAM.LongDisplacement && !isUInt<12>(AM.BaseOffs))
+ return false;
+
+ if (!SupportedAM.IndexReg)
// No indexing allowed.
return AM.Scale == 0;
else
@@ -711,15 +714,6 @@ bool SystemZTargetLowering::isLegalAddre
return AM.Scale == 0 || AM.Scale == 1;
}
-// TODO: Should we check for isInt<20> also?
-bool SystemZTargetLowering::isFoldableMemAccessOffset(Instruction *I,
- int64_t Offset) const {
- if (!supportedAddressingMode(I, Subtarget.hasVector()).LongDisplacement)
- return (isUInt<12>(Offset));
-
- return true;
-}
-
bool SystemZTargetLowering::isTruncateFree(Type *FromType, Type *ToType) const {
if (!FromType->isIntegerTy() || !ToType->isIntegerTy())
return false;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h Wed Aug 9 04:28:01 2017
@@ -398,7 +398,6 @@ public:
bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
unsigned AS,
Instruction *I = nullptr) const override;
- bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const override;
bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS,
unsigned Align,
bool *Fast) const override;
Modified: llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopStrengthReduce.cpp Wed Aug 9 04:28:01 2017
@@ -1160,6 +1160,12 @@ public:
} // end anonymous namespace
+static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
+ LSRUse::KindType Kind, MemAccessTy AccessTy,
+ GlobalValue *BaseGV, int64_t BaseOffset,
+ bool HasBaseReg, int64_t Scale,
+ Instruction *Fixup = nullptr);
+
/// Tally up interesting quantities from the given register.
void Cost::RateRegister(const SCEV *Reg,
SmallPtrSetImpl<const SCEV *> &Regs,
@@ -1288,7 +1294,8 @@ void Cost::RateFormula(const TargetTrans
// Check with target if this offset with this instruction is
// specifically not supported.
if (LU.Kind == LSRUse::Address && Offset != 0 &&
- !TTI.isFoldableMemAccessOffset(Fixup.UserInst, Offset))
+ !isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
+ Offset, F.HasBaseReg, F.Scale, Fixup.UserInst))
C.NumBaseAdds++;
}
@@ -1543,7 +1550,7 @@ static bool isAMCompletelyFolded(const T
LSRUse::KindType Kind, MemAccessTy AccessTy,
GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale,
- Instruction *Fixup = nullptr) {
+ Instruction *Fixup/*= nullptr*/) {
switch (Kind) {
case LSRUse::Address:
return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
Modified: llvm/trunk/test/CodeGen/Hexagon/swp-const-tc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/swp-const-tc.ll?rev=310463&r1=310462&r2=310463&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/swp-const-tc.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/swp-const-tc.ll Wed Aug 9 04:28:01 2017
@@ -4,7 +4,7 @@
; of computing a new LC0 value.
; CHECK-LABEL: @test
-; CHECK: loop0(.LBB0_1,#998)
+; CHECK: loop0(.LBB0_1,#999)
define i32 @test(i32* %A, i32* %B, i32 %count) {
entry:
More information about the llvm-commits
mailing list