[PATCH] D36455: [RISCV] Recognize new relocation types

Chih-Mao Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 8 03:26:19 PDT 2017


PkmX created this revision.

These new relocation types were taken from latest RISC-V binutils.

They are needed by the RISC-V port of lld which we plan to upstream, so we figured we should let this change land in llvm first.


https://reviews.llvm.org/D36455

Files:
  include/llvm/BinaryFormat/ELFRelocs/RISCV.def


Index: include/llvm/BinaryFormat/ELFRelocs/RISCV.def
===================================================================
--- include/llvm/BinaryFormat/ELFRelocs/RISCV.def
+++ include/llvm/BinaryFormat/ELFRelocs/RISCV.def
@@ -48,3 +48,12 @@
 ELF_RELOC(R_RISCV_RVC_LUI,           46)
 ELF_RELOC(R_RISCV_GPREL_I,           47)
 ELF_RELOC(R_RISCV_GPREL_S,           48)
+ELF_RELOC(R_RISCV_TPREL_I,           49)
+ELF_RELOC(R_RISCV_TPREL_S,           50)
+ELF_RELOC(R_RISCV_RELAX,             51)
+ELF_RELOC(R_RISCV_SUB6,              52)
+ELF_RELOC(R_RISCV_SET6,              53)
+ELF_RELOC(R_RISCV_SET8,              54)
+ELF_RELOC(R_RISCV_SET16,             55)
+ELF_RELOC(R_RISCV_SET32,             56)
+ELF_RELOC(R_RISCV_32_PCREL,          57)


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