[PATCH] D36421: AMDGPU: Implement getMinimumNopSize

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, kzhuravl.

Not sure what this really does


https://reviews.llvm.org/D36421

Files:
  lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp


Index: lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
===================================================================
--- lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -47,6 +47,8 @@
                         MCInst &Res) const override {
     llvm_unreachable("Not implemented");
   }
+
+  unsigned getMinimumNopSize() const override;
   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
 
   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
@@ -151,6 +153,10 @@
   return Infos[Kind - FirstTargetFixupKind];
 }
 
+unsigned AMDGPUAsmBackend::getMinimumNopSize() const {
+  return 4;
+}
+
 bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
   // If the count is not 4-byte aligned, we must be writing data into the text
   // section (otherwise we have unaligned instructions, and thus have far


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