[PATCH] D36219: [ARM] Tidy up banked registers encoding

[Florian Hahn via Phabricator via llvm-commits]

fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

LGTM, looks like a straight-forward improvement. I just have 2 nits. Please hold off with committing for a bit, so other people have time to voice concerns.



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Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:4178
 
   // The values here come from B9.2.3 of the ARM ARM, where bits 4-0 are SysM
   // and bit 5 is R.
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Should this comment be moved to lib/Target/ARM/ARMSystemRegister.td too?


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Comment at: lib/Target/ARM/Utils/ARMBaseInfo.cpp:46
+  namespace ARMBankedReg {
+#define GET_BANKEDREG_IMPL
+#include "ARMGenSystemRegister.inc"
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not sure what the correct indentation for macros is, but this seems slightly inconsistent with lib/Target/ARM/Utils/ARMBaseInfo.h:69, where it was aligned with the code.


https://reviews.llvm.org/D36219