[PATCH] D35919: [AArch64] Fix callee saved registers in win64 vararg functions with CombineSPBump=0

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added a comment.

In https://reviews.llvm.org/D35919#824351, @mgrang wrote:

> @mstorsjo Could you please add me as subscriber to your COFF ARM64 patches? We are trying to build spec2k/spec2k6 for COFF and running into issues with vararg functions. Some of your patches have fixed our issues :)


Sorry, I forgot to add you on this one :-) I've got a revision of this one coming up pretty soon, I'm trying to get all the corner cases tested properly this time. A partial fix is to skip the change in line 536/539, but that change is also needed (with some other bits) for completeness.


https://reviews.llvm.org/D35919