[PATCH] D35978: [AVX-512] Don't use unmasked VMOVDQU8/16 for 8-bit or 16-bit element stores even when BWI instructions are supported. Always use VMOVDQA32/VMOVDQU32.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.

We were already using the 32 bit element opcode if BWI isn't enabled, but there's no reason to change opcode if we have BWI. We will still use the 8/16 opcodes for masked stores though.

      

This allows us to use the aligned opcode when we can which makes our test output more consistent between different modes. It also reduces the number of isel patterns we need.

This is a slight inconsistency with loads which default to 64 bit element opcodes. I'll probably rectify that in a future patch.


https://reviews.llvm.org/D35978

Files:
  lib/Target/X86/X86InstrAVX512.td
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/avx512-insert-extract_i1.ll
  test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
  test/CodeGen/X86/avx512bw-mov.ll
  test/CodeGen/X86/avx512bwvl-mov.ll
  test/CodeGen/X86/subvector-broadcast.ll
  test/CodeGen/X86/x86-interleaved-access.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D35978.108587.patch
Type: text/x-patch
Size: 23807 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170728/66b1b18a/attachment.bin>