[PATCH] D35774: [x86][inline-asm]Extend support for memory reference expression

[Reid Kleckner via Phabricator via llvm-commits]

rnk added a comment.

I would really prefer to see fewer rewrites and more pass through of inline assembly to MC. The way we parse inline asm in two phases is a confusing source of bugs. It also makes it harder to test the Intel asm parser, since the more rewrites we do the more cross-repository tests we have to add.



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Comment at: include/llvm/MC/MCParser/MCTargetAsmParser.h:77
+  IntelExprRewrite(StringRef base, StringRef index, unsigned scale,
+    unsigned immDisp) : Base(base), Index(index), Scale(scale),
+                        ImmDisp(immDisp) {};
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format


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Comment at: test/MC/X86/intel-syntax-error.s:21-24
-//CHECK: error: cannot use base register with variable reference
-mov eax, DWORD PTR arr[ebp + 1 + (2 * 5) - 3 + 1<<1]
-//CHECK: error: cannot use index register with variable reference
-mov eax, DWORD PTR arr[esi*4]
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I see, these are in fact valid x86. :) Can you move them to a valid test case so we don't lose coverage, like test/MC/X86/intel-syntax.s?


Repository:
  rL LLVM

https://reviews.llvm.org/D35774