[llvm] r308589 - [X86] Regenerate shift-and.ll and shift-bmi2.ll using update_llc_test_checks.py.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 19 23:19:53 PDT 2017


Author: ctopper
Date: Wed Jul 19 23:19:53 2017
New Revision: 308589

URL: http://llvm.org/viewvc/llvm-project?rev=308589&view=rev
Log:
[X86] Regenerate shift-and.ll and shift-bmi2.ll using update_llc_test_checks.py.

I've stripped the checks for 64-bit types in 32-bit mode to match the existing tests.

Modified:
    llvm/trunk/test/CodeGen/X86/shift-and.ll
    llvm/trunk/test/CodeGen/X86/shift-bmi2.ll

Modified: llvm/trunk/test/CodeGen/X86/shift-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-and.ll?rev=308589&r1=308588&r2=308589&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-and.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-and.ll Wed Jul 19 23:19:53 2017
@@ -1,14 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i386-apple-macosx   | FileCheck %s --check-prefix=X32
 ; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s --check-prefix=X64
 
 define i32 @t1(i32 %t, i32 %val) nounwind {
 ; X32-LABEL: t1:
-; X32-NOT: andl
-; X32: shll
-
+; X32:       ## BB#0:
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT:    shll %cl, %eax
+; X32-NEXT:    retl
+; X32-NEXT:    ## -- End function
+;
 ; X64-LABEL: t1:
-; X64-NOT: andl
-; X64: shll
+; X64:       ## BB#0:
+; X64-NEXT:    movl %edi, %ecx
+; X64-NEXT:    shll %cl, %esi
+; X64-NEXT:    movl %esi, %eax
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
+
        %shamt = and i32 %t, 31
        %res = shl i32 %val, %shamt
        ret i32 %res
@@ -16,12 +26,21 @@ define i32 @t1(i32 %t, i32 %val) nounwin
 
 define i32 @t2(i32 %t, i32 %val) nounwind {
 ; X32-LABEL: t2:
-; X32-NOT: andl
-; X32: shll
-
+; X32:       ## BB#0:
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT:    shll %cl, %eax
+; X32-NEXT:    retl
+; X32-NEXT:    ## -- End function
+;
 ; X64-LABEL: t2:
-; X64-NOT: andl
-; X64: shll
+; X64:       ## BB#0:
+; X64-NEXT:    movl %edi, %ecx
+; X64-NEXT:    shll %cl, %esi
+; X64-NEXT:    movl %esi, %eax
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
+
        %shamt = and i32 %t, 63
        %res = shl i32 %val, %shamt
        ret i32 %res
@@ -31,12 +50,19 @@ define i32 @t2(i32 %t, i32 %val) nounwin
 
 define void @t3(i16 %t) nounwind {
 ; X32-LABEL: t3:
-; X32-NOT: andl
-; X32: sarw
-
+; X32:       ## BB#0:
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; X32-NEXT:    sarw %cl, _X
+; X32-NEXT:    retl
+; X32-NEXT:    ## -- End function
+;
 ; X64-LABEL: t3:
-; X64-NOT: andl
-; X64: sarw
+; X64:       ## BB#0:
+; X64-NEXT:    movl %edi, %ecx
+; X64-NEXT:    sarw %cl, {{.*}}(%rip)
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
+
        %shamt = and i16 %t, 31
        %tmp = load i16, i16* @X
        %tmp1 = ashr i16 %tmp, %shamt
@@ -46,8 +72,12 @@ define void @t3(i16 %t) nounwind {
 
 define i64 @t4(i64 %t, i64 %val) nounwind {
 ; X64-LABEL: t4:
-; X64-NOT: and
-; X64: shrq
+; X64:       ## BB#0:
+; X64-NEXT:    movl %edi, %ecx
+; X64-NEXT:    shrq %cl, %rsi
+; X64-NEXT:    movq %rsi, %rax
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
        %shamt = and i64 %t, 63
        %res = lshr i64 %val, %shamt
        ret i64 %res
@@ -55,8 +85,12 @@ define i64 @t4(i64 %t, i64 %val) nounwin
 
 define i64 @t5(i64 %t, i64 %val) nounwind {
 ; X64-LABEL: t5:
-; X64-NOT: and
-; X64: shrq
+; X64:       ## BB#0:
+; X64-NEXT:    movl %edi, %ecx
+; X64-NEXT:    shrq %cl, %rsi
+; X64-NEXT:    movq %rsi, %rax
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
        %shamt = and i64 %t, 191
        %res = lshr i64 %val, %shamt
        ret i64 %res
@@ -65,14 +99,18 @@ define i64 @t5(i64 %t, i64 %val) nounwin
 
 ; rdar://11866926
 define i64 @t6(i64 %key, i64* nocapture %val) nounwind {
-entry:
 ; X64-LABEL: t6:
-; X64-NOT: movabsq
-; X64: decq
-; X64: andq
+; X64:       ## BB#0:
+; X64-NEXT:    shrq $3, %rdi
+; X64-NEXT:    movq (%rsi), %rax
+; X64-NEXT:    decq %rax
+; X64-NEXT:    andq %rdi, %rax
+; X64-NEXT:    retq
+; X64-NEXT:    ## -- End function
+; X64-NEXT:  .zerofill __DATA,__bss,_X,2,1 ## @X
   %shr = lshr i64 %key, 3
-  %0 = load i64, i64* %val, align 8
-  %sub = add i64 %0, 2305843009213693951
+  %1 = load i64, i64* %val, align 8
+  %sub = add i64 %1, 2305843009213693951
   %and = and i64 %sub, %shr
   ret i64 %and
 }

Modified: llvm/trunk/test/CodeGen/X86/shift-bmi2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/shift-bmi2.ll?rev=308589&r1=308588&r2=308589&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/shift-bmi2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/shift-bmi2.ll Wed Jul 19 23:19:53 2017
@@ -1,178 +1,211 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=i386-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI2 %s
 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI264 %s
 
 define i32 @shl32(i32 %x, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: shl32:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    shlxl %eax, {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: shl32:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shlxl %esi, %edi, %eax
+; BMI264-NEXT:    retq
   %shl = shl i32 %x, %shamt
-; BMI2: shl32
-; BMI2: shlxl
-; BMI2: ret
-; BMI264: shl32
-; BMI264: shlxl
-; BMI264: ret
   ret i32 %shl
 }
 
 define i32 @shl32i(i32 %x) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: shl32i:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT:    shll $5, %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: shl32i:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shll $5, %edi
+; BMI264-NEXT:    movl %edi, %eax
+; BMI264-NEXT:    retq
   %shl = shl i32 %x, 5
-; BMI2: shl32i
-; BMI2-NOT: shlxl
-; BMI2: ret
-; BMI264: shl32i
-; BMI264-NOT: shlxl
-; BMI264: ret
   ret i32 %shl
 }
 
 define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: shl32p:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; BMI2-NEXT:    shlxl %eax, (%ecx), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: shl32p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shlxl %esi, (%rdi), %eax
+; BMI264-NEXT:    retq
   %x = load i32, i32* %p
   %shl = shl i32 %x, %shamt
-; BMI2: shl32p
-; BMI2: shlxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI2: ret
-; BMI264: shl32p
-; BMI264: shlxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i32 %shl
 }
 
 define i32 @shl32pi(i32* %p) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: shl32pi:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT:    movl (%eax), %eax
+; BMI2-NEXT:    shll $5, %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: shl32pi:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    movl (%rdi), %eax
+; BMI264-NEXT:    shll $5, %eax
+; BMI264-NEXT:    retq
   %x = load i32, i32* %p
   %shl = shl i32 %x, 5
-; BMI2: shl32pi
-; BMI2-NOT: shlxl
-; BMI2: ret
-; BMI264: shl32pi
-; BMI264-NOT: shlxl
-; BMI264: ret
   ret i32 %shl
 }
 
 define i64 @shl64(i64 %x, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: shl64:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shlxq %rsi, %rdi, %rax
+; BMI264-NEXT:    retq
   %shl = shl i64 %x, %shamt
-; BMI264: shl64
-; BMI264: shlxq
-; BMI264: ret
   ret i64 %shl
 }
 
 define i64 @shl64i(i64 %x) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: shl64i:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shlq $7, %rdi
+; BMI264-NEXT:    movq %rdi, %rax
+; BMI264-NEXT:    retq
   %shl = shl i64 %x, 7
-; BMI264: shl64i
-; BMI264-NOT: shlxq
-; BMI264: ret
   ret i64 %shl
 }
 
 define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: shl64p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shlxq %rsi, (%rdi), %rax
+; BMI264-NEXT:    retq
   %x = load i64, i64* %p
   %shl = shl i64 %x, %shamt
-; BMI264: shl64p
-; BMI264: shlxq %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i64 %shl
 }
 
 define i64 @shl64pi(i64* %p) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: shl64pi:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    movq (%rdi), %rax
+; BMI264-NEXT:    shlq $7, %rax
+; BMI264-NEXT:    retq
   %x = load i64, i64* %p
   %shl = shl i64 %x, 7
-; BMI264: shl64pi
-; BMI264-NOT: shlxq
-; BMI264: ret
   ret i64 %shl
 }
 
 define i32 @lshr32(i32 %x, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: lshr32:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    shrxl %eax, {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: lshr32:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shrxl %esi, %edi, %eax
+; BMI264-NEXT:    retq
   %shl = lshr i32 %x, %shamt
-; BMI2: lshr32
-; BMI2: shrxl
-; BMI2: ret
-; BMI264: lshr32
-; BMI264: shrxl
-; BMI264: ret
   ret i32 %shl
 }
 
 define i32 @lshr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: lshr32p:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; BMI2-NEXT:    shrxl %eax, (%ecx), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: lshr32p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shrxl %esi, (%rdi), %eax
+; BMI264-NEXT:    retq
   %x = load i32, i32* %p
   %shl = lshr i32 %x, %shamt
-; BMI2: lshr32p
-; BMI2: shrxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI2: ret
-; BMI264: lshr32p
-; BMI264: shrxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i32 %shl
 }
 
 define i64 @lshr64(i64 %x, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: lshr64:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shrxq %rsi, %rdi, %rax
+; BMI264-NEXT:    retq
   %shl = lshr i64 %x, %shamt
-; BMI264: lshr64
-; BMI264: shrxq
-; BMI264: ret
   ret i64 %shl
 }
 
 define i64 @lshr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: lshr64p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    shrxq %rsi, (%rdi), %rax
+; BMI264-NEXT:    retq
   %x = load i64, i64* %p
   %shl = lshr i64 %x, %shamt
-; BMI264: lshr64p
-; BMI264: shrxq %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i64 %shl
 }
 
 define i32 @ashr32(i32 %x, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: ashr32:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    sarxl %eax, {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: ashr32:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    sarxl %esi, %edi, %eax
+; BMI264-NEXT:    retq
   %shl = ashr i32 %x, %shamt
-; BMI2: ashr32
-; BMI2: sarxl
-; BMI2: ret
-; BMI264: ashr32
-; BMI264: sarxl
-; BMI264: ret
   ret i32 %shl
 }
 
 define i32 @ashr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
-entry:
+; BMI2-LABEL: ashr32p:
+; BMI2:       # BB#0:
+; BMI2-NEXT:    movb {{[0-9]+}}(%esp), %al
+; BMI2-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; BMI2-NEXT:    sarxl %eax, (%ecx), %eax
+; BMI2-NEXT:    retl
+;
+; BMI264-LABEL: ashr32p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    sarxl %esi, (%rdi), %eax
+; BMI264-NEXT:    retq
   %x = load i32, i32* %p
   %shl = ashr i32 %x, %shamt
-; BMI2: ashr32p
-; BMI2: sarxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI2: ret
-; BMI264: ashr32p
-; BMI264: sarxl %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i32 %shl
 }
 
 define i64 @ashr64(i64 %x, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: ashr64:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    sarxq %rsi, %rdi, %rax
+; BMI264-NEXT:    retq
   %shl = ashr i64 %x, %shamt
-; BMI264: ashr64
-; BMI264: sarxq
-; BMI264: ret
   ret i64 %shl
 }
 
 define i64 @ashr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
-entry:
+; BMI264-LABEL: ashr64p:
+; BMI264:       # BB#0:
+; BMI264-NEXT:    sarxq %rsi, (%rdi), %rax
+; BMI264-NEXT:    retq
   %x = load i64, i64* %p
   %shl = ashr i64 %x, %shamt
-; BMI264: ashr64p
-; BMI264: sarxq %{{.+}}, ({{.+}}), %{{.+}}
-; BMI264: ret
   ret i64 %shl
 }




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