[PATCH] D35568: [AArch64] Use 16 bytes as preferred function alignment on Cortex-A53.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


================
Comment at: lib/Target/AArch64/AArch64Subtarget.cpp:133-135
+  case CortexA53:
+    PrefFunctionAlignment = 4;
+    break;
----------------
davide wrote:
> fhahn wrote:
> > davide wrote:
> > > I assume you're talking about the llvm test-suite benchmarks. 
> > > If not, you may want to add a link to your benchmarks :)
> > > 
> > > That said, the size increase seems non negligible. Have you considered disabling this when optimizing for size?
> > Yes I meant the llvm test-suite benchmarks :)
> > 
> > I'll look into only setting PerfFunctionAlignment only when not optimizing for size. That seems like a sensible thing to do and may be worth doing for the other Cortex-A cores too.
> Thank you. That's greatly appreciated.
> That said, the size increase seems non negligible. Have you considered disabling this when optimizing for size?

After having a look I found that PrefFunctionAlignment is not set when optimizing for size [1], so we do not have to handle the case in AArch64Subtarget.cpp

[1] https://github.com/llvm-mirror/llvm/blob/master/lib/CodeGen/MachineFunction.cpp#L132




https://reviews.llvm.org/D35568