[PATCH] D24623: AMDGPU: Implement memory model

[Konstantin Zhuravlyov via Phabricator via llvm-commits]

kzhuravl added inline comments.


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Comment at: lib/Target/AMDGPU/SIMemoryLegalizer.cpp:327
+  AtomicOrdering SuccessOrdering = MMO->getOrdering();
+  AtomicOrdering FailureOrdering = MMO->getFailureOrdering();
+  SyncScope::ID SSID = static_cast<SyncScope::ID>(MMO->getSyncScopeID());
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t-tye wrote:
> May be worth asserting that FailureOrdering is not AtomicOrdering::Release or AtomicOrdering::AcquireRelease as these are not allowed, and following code relies on that fact.
Verifier takes care of those.


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Comment at: test/CodeGen/AMDGPU/flat_atomics.ll:1001
 ; GCN-LABEL: {{^}}atomic_store_i32_offset:
-; CIVI: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}} glc{{$}}
-; GFX9: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}} offset:16 glc{{$}}
+; CIVI: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}}{{$}}
+; GFX9: flat_store_dword v[{{[0-9]+}}:{{[0-9]+}}], {{v[0-9]+}} offset:16{{$}}
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t-tye wrote:
> Curious why glc is no longer being checked for?
Not required here. Discussed offline.


https://reviews.llvm.org/D24623