[PATCH] D35209: [ARM] Unify handling of M-Class system registers

[Oliver Stannard via Phabricator via llvm-commits]

olista01 accepted this revision.
olista01 added a comment.
This revision is now accepted and ready to land.

LGTM with a few minor changes.



================
Comment at: lib/Target/ARM/ARMSystemRegister.td:18
+// 'Mask' bits create unique keys for searches.
+// [|i|e|x]apsr_nzcvq has alias [|i|e|x]apsr.
+//
----------------
This comment could be moved down next to the registers in question.


================
Comment at: lib/Target/ARM/ARMSystemRegister.td:74
+let Requires = [{ {ARM::HasV8MBaselineOps} }] in {
+def : MClassSysReg<0,    0,    1,    0x80a, "msplim">; // exists only on v8M
+def : MClassSysReg<0,    0,    1,    0x80b, "psplim">; // exists only on v8M
----------------
These comments can be removed as they are now obvious from the "let Requires =" lines.


https://reviews.llvm.org/D35209