[PATCH] D35390: AMDGPU: Pass special input registers to functions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:3600
+
+  return DAG.getLoad(VT, SL, DAG.getEntryNode(), Ptr, SrcPtrInfo, 4,
+                     MachineMemOperand::MODereferenceable |
----------------
rampitec wrote:
> Do not you need to get alignment from DL and VT?
This is only used for workitem IDs, which are always 4 bytes.


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1123
+  if (RegIdx == ArgSGPRs.size())
+    report_fatal_error("ran out of SGPRs for arguments");
+
----------------
rampitec wrote:
> Shall we use stack for scalar arguments as well, or shall we try to use VGPR first maybe?
> I assume we may have user SGPR arguments as well, not predefined ones only.
There can't be user SGPR arguments now. A future extension may be to use the inreg attribute for these like mesa does now for shaders.


https://reviews.llvm.org/D35390