[PATCH] D34999: [AArch64] Avoid selecting XZR inline ASM memory operand

[Yi Kong via Phabricator via llvm-commits]

kongyi added a comment.

In https://reviews.llvm.org/D34999#802781, @efriedma wrote:

> Is this really the best place to solve this issue?
>
> PowerPC has a similar problem (r0 can't be used for memory addresses); the PPC backend solves it in PPCDAGToDAGISel::SelectInlineAsmMemoryOperand.
>
> For non-memory inline asm operands, SelectionDAGBuilder::visitInlineAsm has code to constrain the register classes.


Thanks, this is a more suitable place to implement the logic.


Repository:
  rL LLVM

https://reviews.llvm.org/D34999