[PATCH] D35345: AMDGPU: Figure out private memory regs after lowering

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:5720
+// the function is legalized do we know all of the non-spill stack objects or if
+// calls are present.
+void SITargetLowering::finalizeLowering(MachineFunction &MF) const {
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rampitec wrote:
> If we are lowering starting from the leafs cannot we check if calls actually require an SP? Do not we have a CG?
The details of the call graph aren't important for this. I've been assuming any call requires stack access. Try to interprocedurally remove that would add too much complexity at this stage for not much benefit.

The call checks and all the SP handling here are dead code here since most of the call work isn't upstream yet.


https://reviews.llvm.org/D35345