[PATCH] D21723: [RFC] Enhance synchscope representation

Konstantin Zhuravlyov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 11 15:23:53 PDT 2017


This revision was automatically updated to reflect the committed changes.
kzhuravl marked an inline comment as done.
Closed by commit rL307722: Enhance synchscope representation (authored by kzhuravl).

Changed prior to commit:
  https://reviews.llvm.org/D21723?vs=105496&id=106105#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D21723

Files:
  llvm/trunk/docs/LangRef.rst
  llvm/trunk/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/trunk/include/llvm/CodeGen/MachineFunction.h
  llvm/trunk/include/llvm/CodeGen/MachineMemOperand.h
  llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
  llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/trunk/include/llvm/IR/IRBuilder.h
  llvm/trunk/include/llvm/IR/Instructions.h
  llvm/trunk/include/llvm/IR/LLVMContext.h
  llvm/trunk/lib/AsmParser/LLLexer.cpp
  llvm/trunk/lib/AsmParser/LLParser.cpp
  llvm/trunk/lib/AsmParser/LLParser.h
  llvm/trunk/lib/AsmParser/LLToken.h
  llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/trunk/lib/CodeGen/AtomicExpandPass.cpp
  llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
  llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
  llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/trunk/lib/CodeGen/MIRPrinter.cpp
  llvm/trunk/lib/CodeGen/MachineFunction.cpp
  llvm/trunk/lib/CodeGen/MachineInstr.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/trunk/lib/IR/AsmWriter.cpp
  llvm/trunk/lib/IR/Core.cpp
  llvm/trunk/lib/IR/Instruction.cpp
  llvm/trunk/lib/IR/Instructions.cpp
  llvm/trunk/lib/IR/LLVMContext.cpp
  llvm/trunk/lib/IR/LLVMContextImpl.cpp
  llvm/trunk/lib/IR/LLVMContextImpl.h
  llvm/trunk/lib/IR/Verifier.cpp
  llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
  llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/lib/Transforms/IPO/GlobalOpt.cpp
  llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
  llvm/trunk/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
  llvm/trunk/lib/Transforms/Scalar/GVN.cpp
  llvm/trunk/lib/Transforms/Scalar/JumpThreading.cpp
  llvm/trunk/lib/Transforms/Scalar/SROA.cpp
  llvm/trunk/lib/Transforms/Utils/FunctionComparator.cpp
  llvm/trunk/test/Assembler/atomic.ll
  llvm/trunk/test/Bitcode/atomic-no-syncscope.ll
  llvm/trunk/test/Bitcode/atomic-no-syncscope.ll.bc
  llvm/trunk/test/Bitcode/atomic.ll
  llvm/trunk/test/Bitcode/compatibility-3.6.ll
  llvm/trunk/test/Bitcode/compatibility-3.7.ll
  llvm/trunk/test/Bitcode/compatibility-3.8.ll
  llvm/trunk/test/Bitcode/compatibility-3.9.ll
  llvm/trunk/test/Bitcode/compatibility-4.0.ll
  llvm/trunk/test/Bitcode/compatibility.ll
  llvm/trunk/test/Bitcode/memInstructions.3.2.ll
  llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  llvm/trunk/test/CodeGen/AArch64/fence-singlethread.ll
  llvm/trunk/test/CodeGen/AMDGPU/syncscopes.ll
  llvm/trunk/test/CodeGen/ARM/fence-singlethread.ll
  llvm/trunk/test/CodeGen/MIR/AArch64/atomic-memoperands.mir
  llvm/trunk/test/CodeGen/MIR/AMDGPU/syncscopes.mir
  llvm/trunk/test/CodeGen/PowerPC/atomics-regression.ll
  llvm/trunk/test/Instrumentation/ThreadSanitizer/atomic.ll
  llvm/trunk/test/Linker/Inputs/syncscope-1.ll
  llvm/trunk/test/Linker/Inputs/syncscope-2.ll
  llvm/trunk/test/Linker/syncscopes.ll
  llvm/trunk/test/Transforms/GVN/PRE/atomic.ll
  llvm/trunk/test/Transforms/InstCombine/consecutive-fences.ll
  llvm/trunk/test/Transforms/Sink/fence.ll
  llvm/trunk/unittests/Analysis/AliasAnalysisTest.cpp

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