[llvm] r307718 - [x86] auto-generate full checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 11 15:04:36 PDT 2017
Author: spatel
Date: Tue Jul 11 15:04:36 2017
New Revision: 307718
URL: http://llvm.org/viewvc/llvm-project?rev=307718&view=rev
Log:
[x86] auto-generate full checks; NFC
Modified:
llvm/trunk/test/CodeGen/X86/cmov.ll
Modified: llvm/trunk/test/CodeGen/X86/cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov.ll?rev=307718&r1=307717&r2=307718&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmov.ll Tue Jul 11 15:04:36 2017
@@ -1,34 +1,36 @@
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -disable-cgp-select2branch | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
-entry:
; CHECK-LABEL: test1:
-; CHECK: btl
-; CHECK-NEXT: movl $12, %eax
-; CHECK-NEXT: cmovael (%rcx), %eax
-; CHECK-NEXT: ret
-
- %0 = lshr i32 %x, %n ; <i32> [#uses=1]
- %1 = and i32 %0, 1 ; <i32> [#uses=1]
- %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: btl %esi, %edi
+; CHECK-NEXT: movl $12, %eax
+; CHECK-NEXT: cmovael (%rcx), %eax
+; CHECK-NEXT: retq
+entry:
+ %0 = lshr i32 %x, %n
+ %1 = and i32 %0, 1
+ %toBool = icmp eq i32 %1, 0
%v = load i32, i32* %vp
- %.0 = select i1 %toBool, i32 %v, i32 12 ; <i32> [#uses=1]
+ %.0 = select i1 %toBool, i32 %v, i32 12
ret i32 %.0
}
+
define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
-entry:
; CHECK-LABEL: test2:
-; CHECK: btl
-; CHECK-NEXT: movl $12, %eax
-; CHECK-NEXT: cmovbl (%rcx), %eax
-; CHECK-NEXT: ret
-
- %0 = lshr i32 %x, %n ; <i32> [#uses=1]
- %1 = and i32 %0, 1 ; <i32> [#uses=1]
- %toBool = icmp eq i32 %1, 0 ; <i1> [#uses=1]
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: btl %esi, %edi
+; CHECK-NEXT: movl $12, %eax
+; CHECK-NEXT: cmovbl (%rcx), %eax
+; CHECK-NEXT: retq
+entry:
+ %0 = lshr i32 %x, %n
+ %1 = and i32 %0, 1
+ %toBool = icmp eq i32 %1, 0
%v = load i32, i32* %vp
- %.0 = select i1 %toBool, i32 12, i32 %v ; <i32> [#uses=1]
+ %.0 = select i1 %toBool, i32 12, i32 %v
ret i32 %.0
}
@@ -41,10 +43,13 @@ declare void @bar(i64) nounwind
define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
; CHECK-LABEL: test3:
-; CHECK: cmov{{n?}}el %[[R1:e..]], %[[R2:e..]]
-; CHECK-NOT: movl
-; CHECK: call
-
+; CHECK: # BB#0:
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: testb $1, %dl
+; CHECK-NEXT: cmovel %esi, %edi
+; CHECK-NEXT: callq bar
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
%c = trunc i64 %a to i32
%d = trunc i64 %b to i32
%e = select i1 %p, i32 %c, i32 %d
@@ -65,52 +70,86 @@ define void @test3(i64 %a, i64 %b, i1 %p
; PR4814
- at g_3 = external global i8 ; <i8*> [#uses=1]
- at g_96 = external global i8 ; <i8*> [#uses=2]
- at g_100 = external global i8 ; <i8*> [#uses=2]
- at _2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1]
+ at g_3 = external global i8
+ at g_96 = external global i8
+ at g_100 = external global i8
+ at _2E_str = external constant [15 x i8], align 1
define i1 @test4() nounwind {
+; CHECK-LABEL: test4:
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: movsbl {{.*}}(%rip), %edx
+; CHECK-NEXT: movl %edx, %eax
+; CHECK-NEXT: shrb $7, %al
+; CHECK-NEXT: movzbl %al, %ecx
+; CHECK-NEXT: xorl $1, %ecx
+; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
+; CHECK-NEXT: sarl %cl, %edx
+; CHECK-NEXT: movb {{.*}}(%rip), %al
+; CHECK-NEXT: testb %al, %al
+; CHECK-NEXT: je .LBB3_2
+; CHECK-NEXT: # BB#1: # %bb.i.i.i
+; CHECK-NEXT: movb {{.*}}(%rip), %cl
+; CHECK-NEXT: .LBB3_2: # %func_4.exit.i
+; CHECK-NEXT: pushq %rbx
+; CHECK-NEXT: testb %dl, %dl
+; CHECK-NEXT: setne %bl
+; CHECK-NEXT: movb %al, %cl
+; CHECK-NEXT: je .LBB3_4
+; CHECK-NEXT: # BB#3: # %func_4.exit.i
+; CHECK-NEXT: xorl %ecx, %ecx
+; CHECK-NEXT: .LBB3_4: # %func_4.exit.i
+; CHECK-NEXT: testb %al, %al
+; CHECK-NEXT: je .LBB3_7
+; CHECK-NEXT: # BB#5: # %func_4.exit.i
+; CHECK-NEXT: testb %bl, %bl
+; CHECK-NEXT: jne .LBB3_7
+; CHECK-NEXT: # BB#6: # %bb.i.i
+; CHECK-NEXT: movb {{.*}}(%rip), %cl
+; CHECK-NEXT: xorl %ebx, %ebx
+; CHECK-NEXT: movb %al, %cl
+; CHECK-NEXT: .LBB3_7: # %func_1.exit
+; CHECK-NEXT: movb %cl, {{.*}}(%rip)
+; CHECK-NEXT: movzbl %cl, %esi
+; CHECK-NEXT: movl $_2E_str, %edi
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: callq printf
+; CHECK-NEXT: movl %ebx, %eax
+; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: retq
entry:
- %0 = load i8, i8* @g_3, align 1 ; <i8> [#uses=2]
- %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
- %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1]
- %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1]
- %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1]
- %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1]
- %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
- %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2]
- %g_96.promoted.i = load i8, i8* @g_96 ; <i8> [#uses=3]
- %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2]
+ %0 = load i8, i8* @g_3, align 1
+ %1 = sext i8 %0 to i32
+ %.lobit.i = lshr i8 %0, 7
+ %tmp.i = zext i8 %.lobit.i to i32
+ %tmp.not.i = xor i32 %tmp.i, 1
+ %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i
+ %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8
+ %2 = icmp eq i8 %retval56.i.i, 0
+ %g_96.promoted.i = load i8, i8* @g_96
+ %3 = icmp eq i8 %g_96.promoted.i, 0
br i1 %3, label %func_4.exit.i, label %bb.i.i.i
-bb.i.i.i: ; preds = %entry
- %4 = load volatile i8, i8* @g_100, align 1 ; <i8> [#uses=0]
+bb.i.i.i:
+ %4 = load volatile i8, i8* @g_100, align 1
br label %func_4.exit.i
-; CHECK-LABEL: test4:
-; CHECK: g_100
-; CHECK: testb
-; CHECK-NOT: xor
-; CHECK: setne
-; CHECK: testb
-
-func_4.exit.i: ; preds = %bb.i.i.i, %entry
- %.not.i = xor i1 %2, true ; <i1> [#uses=1]
- %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1]
- %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
+func_4.exit.i:
+ %.not.i = xor i1 %2, true
+ %brmerge.i = or i1 %3, %.not.i
+ %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0
br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
-bb.i.i: ; preds = %func_4.exit.i
- %5 = load volatile i8, i8* @g_100, align 1 ; <i8> [#uses=0]
+bb.i.i:
+ %5 = load volatile i8, i8* @g_100, align 1
br label %func_1.exit
-func_1.exit: ; preds = %bb.i.i, %func_4.exit.i
- %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
+func_1.exit:
+ %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ]
%ret = phi i1 [ 0, %bb.i.i ], [ %.not.i, %func_4.exit.i ]
store i8 %g_96.tmp.0.i, i8* @g_96
- %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1]
- %7 = tail call i32 (i8*, ...) @printf(i8* noalias getelementptr ([15 x i8], [15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
+ %6 = zext i8 %g_96.tmp.0.i to i32
+ %7 = tail call i32 (i8*, ...) @printf(i8* noalias getelementptr ([15 x i8], [15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind
ret i1 %ret
}
@@ -120,29 +159,32 @@ declare i32 @printf(i8* nocapture, ...)
; Should compile to setcc | -2.
; rdar://6668608
define i32 @test5(i32* nocapture %P) nounwind readonly {
-entry:
; CHECK-LABEL: test5:
-; CHECK: xorl %eax, %eax
-; CHECK: setg %al
-; CHECK: orl $-2, %eax
-; CHECK: ret
-
- %0 = load i32, i32* %P, align 4 ; <i32> [#uses=1]
- %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpl $41, (%rdi)
+; CHECK-NEXT: setg %al
+; CHECK-NEXT: orl $-2, %eax
+; CHECK-NEXT: retq
+entry:
+ %0 = load i32, i32* %P, align 4
+ %1 = icmp sgt i32 %0, 41
+ %iftmp.0.0 = select i1 %1, i32 -1, i32 -2
ret i32 %iftmp.0.0
}
define i32 @test6(i32* nocapture %P) nounwind readonly {
-entry:
; CHECK-LABEL: test6:
-; CHECK: xorl %eax, %eax
-; CHECK: setl %al
-; CHECK: leal 4(%rax,%rax,8), %eax
-; CHECK: ret
- %0 = load i32, i32* %P, align 4 ; <i32> [#uses=1]
- %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1]
+; CHECK: # BB#0: # %entry
+; CHECK-NEXT: xorl %eax, %eax
+; CHECK-NEXT: cmpl $42, (%rdi)
+; CHECK-NEXT: setl %al
+; CHECK-NEXT: leal 4(%rax,%rax,8), %eax
+; CHECK-NEXT: retq
+entry:
+ %0 = load i32, i32* %P, align 4
+ %1 = icmp sgt i32 %0, 41
+ %iftmp.0.0 = select i1 %1, i32 4, i32 13
ret i32 %iftmp.0.0
}
@@ -151,16 +193,21 @@ entry:
; because it isn't worth it. Just use a branch instead.
define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
; CHECK-LABEL: test7:
-; CHECK: testb $1, %dil
-; CHECK-NEXT: jne LBB
-
+; CHECK: # BB#0:
+; CHECK-NEXT: testb $1, %dil
+; CHECK-NEXT: jne .LBB6_2
+; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: movb %dl, %sil
+; CHECK-NEXT: .LBB6_2:
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: retq
%d = select i1 %c, i8 %a, i8 %b
ret i8 %d
}
define i32 @smin(i32 %x) {
; CHECK-LABEL: smin:
-; CHECK: ## BB#0:
+; CHECK: # BB#0:
; CHECK-NEXT: xorl $-1, %edi
; CHECK-NEXT: movl $-1, %eax
; CHECK-NEXT: cmovsl %edi, %eax
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