[PATCH] D35272: [X86/FastIsel] Fall-back to SelectionDAG when lowering soft-floats

[Davide Italiano via Phabricator via llvm-commits]

davide created this revision.

FastIsel can't handle them, so we would end up crashing during register class selection.
Fixes https://bugs.llvm.org/show_bug.cgi?id=26522


https://reviews.llvm.org/D35272

Files:
  lib/Target/X86/X86FastISel.cpp
  test/CodeGen/X86/fastisel-softfloat.ll


Index: test/CodeGen/X86/fastisel-softfloat.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/fastisel-softfloat.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -o - | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define float @pr26522(float %pat) #0 {
+; CHECK-LABEL: pr26522:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    retq
+  ret float %pat
+}
+
+attributes #0 = { noinline optnone "target-features"="+soft-float" }
Index: lib/Target/X86/X86FastISel.cpp
===================================================================
--- lib/Target/X86/X86FastISel.cpp
+++ lib/Target/X86/X86FastISel.cpp
@@ -3039,6 +3039,9 @@
   if (!Subtarget->is64Bit())
     return false;
 
+  if (Subtarget->useSoftFloat())
+    return false;
+
   // Only handle simple cases. i.e. Up to 6 i32/i64 scalar arguments.
   unsigned GPRCnt = 0;
   unsigned FPRCnt = 0;


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