[PATCH] D35161: [X86] Improve the unknown stepping support for Intel CPUs in getHostCPUName

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.

This patch improves our guessing of unknown Intel CPUs to support Goldmont and skylake-avx512.


https://reviews.llvm.org/D35161

Files:
  lib/Support/Host.cpp


Index: lib/Support/Host.cpp
===================================================================
--- lib/Support/Host.cpp
+++ lib/Support/Host.cpp
@@ -364,7 +364,10 @@
   FEATURE_AVX512SAVE,
   FEATURE_MOVBE,
   FEATURE_ADX,
-  FEATURE_EM64T
+  FEATURE_EM64T,
+  FEATURE_AVX512VL,
+  FEATURE_CLFLUSHOPT,
+  FEATURE_SHA,
 };
 
 // The check below for i386 was copied from clang's cpuid.h (__get_cpuid_max).
@@ -721,8 +724,23 @@
 
     default: // Unknown family 6 CPU, try to guess.
       if (Features & (1 << FEATURE_AVX512)) {
-        *Type = INTEL_XEONPHI; // knl
-        *Subtype = INTEL_KNIGHTS_LANDING;
+        if (Features & (1 << FEATURE_AVX512VL)) {
+          *Type = INTEL_COREI7;
+          *Subtype = INTEL_COREI7_SKYLAKE_AVX512;
+        } else {
+          *Type = INTEL_XEONPHI; // knl
+          *Subtype = INTEL_KNIGHTS_LANDING;
+        }
+        break;
+      }
+      if (Features & (1 << FEATURE_CLFLUSHOPT)) {
+        if (Features & (1 << FEATURE_SHA)) {
+          *Type = INTEL_ATOM;
+          *Subtype = INTEL_ATOM_GOLDMONT;
+        } else {
+          *Type = INTEL_COREI7;
+          *Subtype = INTEL_COREI7_SKYLAKE;
+        }
         break;
       }
       if (Features & (1 << FEATURE_ADX)) {
@@ -979,13 +997,19 @@
   bool HasLeaf7 =
       MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX);
   bool HasADX = HasLeaf7 && ((EBX >> 19) & 1);
+  bool HasCLFLUSHOPT = HasLeaf7 && ((EBX >> 23) & 1);
+  bool HasSHA = HasLeaf7 && ((EBX >> 29) & 1);
   bool HasAVX2 = HasAVX && HasLeaf7 && (EBX & 0x20);
   bool HasAVX512 = HasLeaf7 && HasAVX512Save && ((EBX >> 16) & 1);
+  bool HasAVX512VL = HasLeaf7 && HasAVX512Save && ((EBX >> 31) & 1);
   Features |= (HasAVX << FEATURE_AVX);
   Features |= (HasAVX2 << FEATURE_AVX2);
   Features |= (HasAVX512 << FEATURE_AVX512);
   Features |= (HasAVX512Save << FEATURE_AVX512SAVE);
   Features |= (HasADX << FEATURE_ADX);
+  Features |= (HasAVX512VL << FEATURE_AVX512VL);
+  Features |= (HasCLFLUSHOPT << FEATURE_CLFLUSHOPT);
+  Features |= (HasSHA << FEATURE_SHA);
 
   getX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);
   Features |= (((EDX >> 29) & 0x1) << FEATURE_EM64T);


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