[PATCH] D35006: [AArch64] Implement support for windows style vararg functions

[Tim Northover via Phabricator via llvm-commits]

t.p.northover added a comment.

OK, I now see that this actually works. You're essentially redefining the CFA (canonical frame address -- where LLVM bases its SP calculations) to the aligned SP after the extra GPRs have been pushed.

It's not thoroughly broken, but it is confusing and as far as I'm aware unprecedented (32-bit ARM always does this kind of jig to save varargs GPRs but doesn't mangle the CFA in the process). I still think switching back to the original CFA along roughly the lines I proposed earlier is the best way to implement this.


https://reviews.llvm.org/D35006