[PATCH] D35049: LSR tunings for SystemZ, with some minor common code changes

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa created this revision.
Herald added subscribers: kbarton, aheejin, jgravelle-google, sbc100, javed.absar, nhaehnle, nemanjai, sdardis, mzolotukhin, dschuff, arsenm, jfb, jholewinski.

The purpose of this patch is to make LSR generate better code for SystemZ in the cases of memory intrinsics and comparison of immediate with memory. These instructions in particular can have no index register and can only accept a small immediate offset. Improvements on benchmarks have been confirmed.

In order to achieve this, the following common code changes were made:

- New TTI hook: LSRWithInstrQueries(), which defaults to false. Controls if LSR should do instruction-based addressing evaluations by calling isLegalAddressingMode() and isFoldableMemAccessOffset() with the Instruction pointers.
- isLegalAddressingMode() gets a new optional Instruction* parameter  (defaults to nullptr) used by LSR if Target returns true in LSRWithInstrQueries(). All target methods have been updated as well.
- In LSR / isAddressUse(): handle address operands of memset, memmove and memcpy as address uses.
- In LSR / RateFormula(): Don't add to ImmCost if the instructions are already checked. It only adds confusion when the results are otherwise equal. Call isFoldableMemAccessOffset() for any LSRUse::Address, not just loads / stores.
- In LSR / isAMCompletelyFolded(): Let target look at instructions if it returns true in LSRWithInstrQueries().

  SystemZ:
- isLSRCostLess() overriden to check instruction counts like X86 does it.
- isLegalAddressingMode() and isFoldableMemAccessOffset() improved to handle memcpy and compare imm w/ mem.
- LSRWithInstrQueries() returns true
- minor updates of tests dag-combine-01.ll and loop-01.ll
- Two new tests in loop-01.ll


https://reviews.llvm.org/D35049

Files:
  include/llvm/Analysis/TargetTransformInfo.h
  include/llvm/Analysis/TargetTransformInfoImpl.h
  include/llvm/CodeGen/BasicTTIImpl.h
  include/llvm/Target/TargetLowering.h
  lib/Analysis/TargetTransformInfo.cpp
  lib/CodeGen/TargetLoweringBase.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.h
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIISelLowering.h
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMISelLowering.h
  lib/Target/AVR/AVRISelLowering.cpp
  lib/Target/AVR/AVRISelLowering.h
  lib/Target/Hexagon/HexagonISelLowering.cpp
  lib/Target/Hexagon/HexagonISelLowering.h
  lib/Target/Mips/MipsISelLowering.cpp
  lib/Target/Mips/MipsISelLowering.h
  lib/Target/NVPTX/NVPTXISelLowering.cpp
  lib/Target/NVPTX/NVPTXISelLowering.h
  lib/Target/PowerPC/PPCISelLowering.cpp
  lib/Target/PowerPC/PPCISelLowering.h
  lib/Target/SystemZ/SystemZISelLowering.cpp
  lib/Target/SystemZ/SystemZISelLowering.h
  lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
  lib/Target/SystemZ/SystemZTargetTransformInfo.h
  lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  lib/Target/WebAssembly/WebAssemblyISelLowering.h
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  lib/Target/XCore/XCoreISelLowering.cpp
  lib/Target/XCore/XCoreISelLowering.h
  lib/Transforms/Scalar/LoopStrengthReduce.cpp
  test/CodeGen/SystemZ/dag-combine-01.ll
  test/CodeGen/SystemZ/loop-01.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D35049.105394.patch
Type: text/x-patch
Size: 36395 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170706/cf8ef7da/attachment-0001.bin>