[PATCH] D34769: [X86] X86::CMOV to Branch heuristic based optimization

[Amjad Aboud via Phabricator via llvm-commits]

aaboud added a comment.

In https://reviews.llvm.org/D34769#794220, @aaboud wrote:

> In https://reviews.llvm.org/D34769#794214, @hfinkel wrote:
>
> > Interestingly, we just recently introduced a pass into the PowerPC backend that does essentially the same thing; lib/Target/PowerPC/PPCExpandISEL.cpp. Could you please take a look at that and see how it compares to this implementation? I'm obviously curious as to whether we could add some target callbacks and unify the underlying logic in a target-independent pass. FWIW, both implementations are around 500 lines.
>
>
> Thanks for the information, I will take a look.


I reviewed the PowerPC pass in lib/Target/PowerPC/PPCExpandISEL.cpp, it is trying to address same issue like this patch, however, it is different:

PPCExpandISEL

1. Runs after register allocation.
2. User flag based, rather than compilation heuristic, i.e., once it is decided to expand ISEL, it will expand them all.
3. Used as a functionality pass, to cover cases where HW does not support ISEL instruction.

X86CmovConversion

1. Runs on SSA machine IR, before register allocation.
2. Heuristic base optimization, i.e., it can convert only CMOV instructions that worth converting while keeping others.
3. Used only as a performance pass, the functionality pass exists in X86TargetLowering::EmitLoweredSelect, which lowers pseudo CMOV instructions.


https://reviews.llvm.org/D34769