[llvm] r306658 - [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
Michael Zuckerman via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 29 03:00:33 PDT 2017
Author: mzuckerm
Date: Thu Jun 29 03:00:33 2017
New Revision: 306658
URL: http://llvm.org/viewvc/llvm-project?rev=306658&view=rev
Log:
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
[LLVM SIDE]
Connecting the GoldMont processor to his feature.
Reviewers:
1. igorb
2. zvi
3. delena
4. RKSimon
5. craig.topper
Differential Revision: https://reviews.llvm.org/D34504
Modified:
llvm/trunk/lib/Support/Host.cpp
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86Subtarget.h
llvm/trunk/test/CodeGen/X86/atom-call-reg-indirect.ll
llvm/trunk/test/CodeGen/X86/atom-fixup-lea2.ll
llvm/trunk/test/CodeGen/X86/atom-sched.ll
llvm/trunk/test/CodeGen/X86/cpus.ll
Modified: llvm/trunk/lib/Support/Host.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/lib/Support/Host.cpp (original)
+++ llvm/trunk/lib/Support/Host.cpp Thu Jun 29 03:00:33 2017
@@ -327,6 +327,7 @@ enum ProcessorSubtypes {
INTEL_COREI7_SKYLAKE_AVX512,
INTEL_ATOM_BONNELL,
INTEL_ATOM_SILVERMONT,
+ INTEL_ATOM_GOLDMONT,
INTEL_KNIGHTS_LANDING,
AMDPENTIUM_K6,
AMDPENTIUM_K62,
@@ -707,7 +708,12 @@ getIntelProcessorTypeAndSubtype(unsigned
*Type = INTEL_ATOM;
*Subtype = INTEL_ATOM_SILVERMONT;
break; // "silvermont"
-
+ // Goldmont:
+ case 0x5c:
+ case 0x5f:
+ *Type = INTEL_ATOM;
+ *Subtype = INTEL_ATOM_GOLDMONT;
+ break; // "goldmont"
case 0x57:
*Type = INTEL_XEONPHI; // knl
*Subtype = INTEL_KNIGHTS_LANDING;
@@ -1070,6 +1076,8 @@ StringRef sys::getHostCPUName() {
switch (Subtype) {
case INTEL_ATOM_BONNELL:
return "bonnell";
+ case INTEL_ATOM_GOLDMONT:
+ return "goldmont";
case INTEL_ATOM_SILVERMONT:
return "silvermont";
default:
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Thu Jun 29 03:00:33 2017
@@ -300,6 +300,8 @@ def ProcIntelAtom : SubtargetFeature<"at
"Intel Atom processors">;
def ProcIntelSLM : SubtargetFeature<"slm", "X86ProcFamily", "IntelSLM",
"Intel Silvermont processors">;
+def ProcIntelGLM : SubtargetFeature<"glm", "X86ProcFamily", "IntelGLM",
+ "Intel Goldmont processors">;
class Proc<string Name, list<SubtargetFeature> Features>
: ProcessorModel<Name, GenericModel, Features>;
@@ -430,6 +432,34 @@ class SilvermontProc<string Name> : Proc
def : SilvermontProc<"silvermont">;
def : SilvermontProc<"slm">; // Legacy alias.
+class GoldmontProc<string Name> : ProcessorModel<Name, SLMModel, [
+ ProcIntelGLM,
+ FeatureX87,
+ FeatureMMX,
+ FeatureSSE42,
+ FeatureFXSR,
+ FeatureCMPXCHG16B,
+ FeatureMOVBE,
+ FeaturePOPCNT,
+ FeaturePCLMUL,
+ FeatureAES,
+ FeaturePRFCHW,
+ FeatureCallRegIndirect,
+ FeatureSlowLEA,
+ FeatureSlowIncDec,
+ FeatureSlowBTMem,
+ FeatureLAHFSAHF,
+ FeatureMPX,
+ FeatureSHA,
+ FeatureRDSEED,
+ FeatureXSAVE,
+ FeatureXSAVEOPT,
+ FeatureXSAVEC,
+ FeatureXSAVES,
+ FeatureCLFLUSHOPT
+]>;
+def : GoldmontProc<"goldmont">;
+
// "Arrandale" along with corei3 and corei5
class NehalemProc<string Name> : ProcessorModel<Name, SandyBridgeModel, [
FeatureX87,
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Thu Jun 29 03:00:33 2017
@@ -58,7 +58,7 @@ protected:
};
enum X86ProcFamilyEnum {
- Others, IntelAtom, IntelSLM
+ Others, IntelAtom, IntelSLM, IntelGLM
};
/// X86 processor family: Intel Atom, and others
Modified: llvm/trunk/test/CodeGen/X86/atom-call-reg-indirect.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-call-reg-indirect.ll?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-call-reg-indirect.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atom-call-reg-indirect.ll Thu Jun 29 03:00:33 2017
@@ -4,6 +4,8 @@
; RUN: llc < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s
; RUN: llc < %s -mcpu=slm -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
; RUN: llc < %s -mcpu=slm -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
+; RUN: llc < %s -mcpu=goldmont -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
+; RUN: llc < %s -mcpu=goldmont -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
; fn_ptr.ll
Modified: llvm/trunk/test/CodeGen/X86/atom-fixup-lea2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-fixup-lea2.ll?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-fixup-lea2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atom-fixup-lea2.ll Thu Jun 29 03:00:33 2017
@@ -1,4 +1,6 @@
; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
+; RUN: llc < %s -mcpu=goldmont -mtriple=i686-linux | FileCheck %s
+
; CHECK:BB#5
; CHECK-NEXT:leal
; CHECK-NEXT:leal
Modified: llvm/trunk/test/CodeGen/X86/atom-sched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/atom-sched.ll?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/atom-sched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/atom-sched.ll Thu Jun 29 03:00:33 2017
@@ -1,5 +1,6 @@
; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s
; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
+; RUN: llc <%s -O2 -mcpu=goldmont -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s
; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s
;
Modified: llvm/trunk/test/CodeGen/X86/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=306658&r1=306657&r2=306658&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cpus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cpus.ll Thu Jun 29 03:00:33 2017
@@ -18,6 +18,7 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
@@ -34,3 +35,4 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+
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