[llvm] r306109 - [x86] rename test file and auto-generate complete checks; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 23 07:58:22 PDT 2017


Author: spatel
Date: Fri Jun 23 09:58:21 2017
New Revision: 306109

URL: http://llvm.org/viewvc/llvm-project?rev=306109&view=rev
Log:
[x86] rename test file and auto-generate complete checks; NFC

The command-line params override the target setting in the file itself, so delete that.
Also, remove the cpu and arch because those don't matter and neither does the OS specification in the triple.

Added:
    llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.ll
      - copied, changed from r306108, llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll
Removed:
    llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll

Removed: llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll?rev=306108&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll (removed)
@@ -1,23 +0,0 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 | FileCheck %s
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.8.0"
-
-; Make sure that we are zeroing one memory location at a time using xorl and
-; not both using XMM registers.
-
-;CHECK: @foo
-;CHECK: xorl
-;CHECK-NOT: xmm
-;CHECK: ret
-define i32 @foo (i64* %so) nounwind uwtable ssp {
-entry:
-  %used = getelementptr inbounds i64, i64* %so, i32 3
-  store i64 0, i64* %used, align 8
-  %fill = getelementptr inbounds i64, i64* %so, i32 2
-  %L = load i64, i64* %fill, align 8
-  store i64 0, i64* %fill, align 8
-  %cmp28 = icmp sgt i64 %L, 0
-  %R = sext i1 %cmp28 to i32
-  ret i32 %R
-}

Copied: llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.ll (from r306108, llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.ll?p2=llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.ll&p1=llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll&r1=306108&r2=306109&rev=306109&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2012-12-06-python27-miscompile.ll (original)
+++ llvm/trunk/test/CodeGen/X86/merge-consecutive-stores.ll Fri Jun 23 09:58:21 2017
@@ -1,17 +1,29 @@
-; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 | FileCheck %s
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.8.0"
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
 
 ; Make sure that we are zeroing one memory location at a time using xorl and
 ; not both using XMM registers.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.8.0"
 
-;CHECK: @foo
-;CHECK: xorl
-;CHECK-NOT: xmm
-;CHECK: ret
 define i32 @foo (i64* %so) nounwind uwtable ssp {
-entry:
+; CHECK-LABEL: foo:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl $0, 28(%eax)
+; CHECK-NEXT:    movl $0, 24(%eax)
+; CHECK-NEXT:    movl 20(%eax), %ecx
+; CHECK-NEXT:    movl $0, 20(%eax)
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    cmpl 16(%eax), %edx
+; CHECK-NEXT:    movl $0, 16(%eax)
+; CHECK-NEXT:    sbbl %ecx, %edx
+; CHECK-NEXT:    movl $-1, %eax
+; CHECK-NEXT:    jl .LBB0_2
+; CHECK-NEXT:  # BB#1:
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:    retl
   %used = getelementptr inbounds i64, i64* %so, i32 3
   store i64 0, i64* %used, align 8
   %fill = getelementptr inbounds i64, i64* %so, i32 2




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