[PATCH] D33720: [PowerPC] Eliminate compares - add i64 sext/zext handling for SETNE

Guozhi Wei via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 22 16:29:44 PDT 2017


Carrot added a comment.

SDValue Xor = IsRHSZero ? LHS :

  SDValue(CurDAG->getMachineNode(PPC::XOR8, dl, MVT::i64, LHS, RHS), 0);

SDValue AC =

    SDValue(CurDAG->getMachineNode(PPC::ADDIC8, dl, MVT::i64, MVT::Glue,
                                   Xor, getI32Imm(~0U, dl)), 0);
  return SDValue(CurDAG->getMachineNode(PPC::SUBFE8, dl, MVT::i64, AC,
                                        Xor, AC.getValue(1)), 0);

Suppose we have RHS literal 0, LHS is a var, its runtime value is also 0, the expected value of the expression should be 0. But the runtime values are:

  Xor  = LHS = 0
  AC = Xor + ~0 = ~0, no carry
  result = Xor - AC - carry = 0 - (~0) = 1

So the code sequence computes out wrong result.


Repository:
  rL LLVM

https://reviews.llvm.org/D33720





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