[PATCH] D34300: [AMDGPU] simplify add x, *ext (setcc) => addc|subb x, 0, setcc

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: lib/Target/AMDGPU/AMDGPUInstrInfo.td:186
 
+def AMDGPUadde : SDNode<"ISD::ADDCARRY", AMDGPUAddeSubeOp, []>;
+
----------------
Weird that the td generic nodes don't exist already for this. Looks like this was added only in April, so you should probably add the generic addcarry/subcarry to TargetSelectionDAG.td


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:473
   }
 
+  setTargetDAGCombine(ISD::ADD);
----------------
ADDCARRY/SUBCARRY should be marked as legal so more combines work on them


================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4866
+    auto Cond = RHS.getOperand(0);
+    if (Cond.getOpcode() == ISD::SETCC) {
+      SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1);
----------------
This is likely any i1 source. We have some other intrinsics that return i1 values, so maybe a todo?


Repository:
  rL LLVM

https://reviews.llvm.org/D34300