[PATCH] D34276: [mips] Alter register classes for MSA pseudo f16 instructions

[Stefan Maksimovic via Phabricator via llvm-commits]

smaksimovic created this revision.
Herald added a subscriber: arichardson.

This change introduces additional machine instructions in functions dealing with the expansion of
msa pseudo f16 instructions due to register classes being inappropriate when checked with machine verifier.


https://reviews.llvm.org/D34276

Files:
  lib/Target/Mips/MipsSEISelLowering.cpp
  test/CodeGen/Mips/msa/f16-llvm-ir.ll

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