[llvm] r304991 - [PowerPC] add memcmp test with nobuiltin attr; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Thu Jun  8 12:09:18 2017
New Revision: 304991

URL: http://llvm.org/viewvc/llvm-project?rev=304991&view=rev
Log:
[PowerPC] add memcmp test with nobuiltin attr; NFC

In SDAG, we don't expand libcalls with a nobuiltin attribute.
It's not clear if that's correct from the existing code comment:
"Don't do the check if marked as nobuiltin for some reason."

...adding a test here either way to show that there is currently
a different behavior implemented in the CGP-based expansion.

Modified:
    llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll?rev=304991&r1=304990&r2=304991&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll Thu Jun  8 12:09:18 2017
@@ -196,3 +196,18 @@ define signext i32 @zeroEqualityTest06()
   ret i32 %cond
 }
 
+define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) {
+; CHECK-LABEL: length2_eq_nobuiltin_attr:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    lhz 3, 0(3)
+; CHECK-NEXT:    lhz 4, 0(4)
+; CHECK-NEXT:    li 5, 0
+; CHECK-NEXT:    li 12, 1
+; CHECK-NEXT:    cmpw 3, 4
+; CHECK-NEXT:    isel 3, 12, 5, 2
+; CHECK-NEXT:    blr
+  %m = tail call signext i32 @memcmp(i8* %X, i8* %Y, i64 2) nobuiltin
+  %c = icmp eq i32 %m, 0
+  ret i1 %c
+}
+