[PATCH] D33994: [DAGCombiner] Add another combine from build vector to shuffle

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: test/CodeGen/X86/vector-shuffle-v48.ll:39
   %5 = lshr <16 x i32> %4, %x2
   %6 = trunc <16 x i32> %5 to <16 x i8>
   ret <16 x i8> %6
----------------
Why do you have all this extra code (zext/mul/lshr/trunc)? Isn't the problem just in the shufflevector?


https://reviews.llvm.org/D33994