[llvm] r304918 - [mips][dsp] Modify repl.ph to accept signed immediate values
Petar Jovanovic via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 7 07:48:46 PDT 2017
Author: petarj
Date: Wed Jun 7 09:48:46 2017
New Revision: 304918
URL: http://llvm.org/viewvc/llvm-project?rev=304918&view=rev
Log:
[mips][dsp] Modify repl.ph to accept signed immediate values
Changed immediate type for repl.ph from uimm10 to simm10 as per the specs.
Repl.qb still accepts uimm8. Both instructions now mimic the behaviour of
GNU as.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D33594
Modified:
llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
llvm/trunk/test/MC/Mips/dsp/invalid.s
llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s
llvm/trunk/test/MC/Mips/micromips-dsp/valid.s
Modified: llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsDSPInstrInfo.td Wed Jun 7 09:48:46 2017
@@ -19,6 +19,7 @@ def immZExt4 : ImmLeaf<i32, [{return isU
def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>;
def immZExt10 : ImmLeaf<i32, [{return isUInt<10>(Imm);}]>;
def immSExt6 : ImmLeaf<i32, [{return isInt<6>(Imm);}]>;
+def immSExt10 : ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
// Mips-specific dsp nodes
def SDT_MipsExtr : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<0, 1>,
@@ -851,8 +852,8 @@ class PACKRL_PH_DESC : CMP_EQ_QB_R3_DESC
class REPL_QB_DESC : REPL_DESC_BASE<"repl.qb", int_mips_repl_qb, uimm8,
immZExt8, NoItinerary, DSPROpnd>;
-class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, uimm10,
- immZExt10, NoItinerary, DSPROpnd>;
+class REPL_PH_DESC : REPL_DESC_BASE<"repl.ph", int_mips_repl_ph, simm10,
+ immSExt10, NoItinerary, DSPROpnd>;
class REPLV_QB_DESC : ABSQ_S_PH_R2_DESC_BASE<"replv.qb", int_mips_repl_qb,
NoItinerary, DSPROpnd, GPR32Opnd>;
Modified: llvm/trunk/test/CodeGen/Mips/dsp-r1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/dsp-r1.ll?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/dsp-r1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/dsp-r1.ll Wed Jun 7 09:48:46 2017
@@ -1172,9 +1172,19 @@ entry:
ret { i32 } %.fca.0.insert
}
+define { i32 } @test__builtin_mips_repl_ph2(i32 %i0) nounwind readnone {
+entry:
+; CHECK: repl.ph
+
+ %0 = tail call <2 x i16> @llvm.mips.repl.ph(i32 -2)
+ %1 = bitcast <2 x i16> %0 to i32
+ %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0
+ ret { i32 } %.fca.0.insert
+}
+
declare <2 x i16> @llvm.mips.repl.ph(i32) nounwind readnone
-define { i32 } @test__builtin_mips_repl_ph2(i32 %i0, i32 %a0) nounwind readnone {
+define { i32 } @test__builtin_mips_repl_ph3(i32 %i0, i32 %a0) nounwind readnone {
entry:
; CHECK: replv.ph
Modified: llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips-dsp/valid.txt Wed Jun 7 09:48:46 2017
@@ -94,7 +94,7 @@
0x00 0x01 0x70 0x7c # CHECK: mtlo $1, $ac1
0x00 0x22 0xf1 0x3c # CHECK: raddu.w.qb $1, $2
0x00 0x20 0x86 0x7c # CHECK: rddsp $1, 2
-0x02 0x00 0x08 0x3d # CHECK: repl.ph $1, 512
+0x00 0x02 0x08 0x3d # CHECK: repl.ph $1, 2
0x00 0x30 0x05 0xfc # CHECK: repl.qb $1, 128
0x00 0x22 0x03 0x3c # CHECK: replv.ph $1, $2
0x00 0x22 0x13 0x3c # CHECK: replv.qb $1, $2
Modified: llvm/trunk/test/MC/Mips/dsp/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/dsp/invalid.s?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/dsp/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/dsp/invalid.s Wed Jun 7 09:48:46 2017
@@ -31,8 +31,8 @@
shilo $ac1, -64 # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate
repl.qb $2, -1 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
repl.qb $2, 256 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
- repl.ph $2, -1 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
- repl.ph $2, 1024 # CHECK: :[[@LINE]]:15: error: expected 10-bit unsigned immediate
+ repl.ph $2, -513 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
+ repl.ph $2, 512 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
rddsp $2, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
rddsp $2, 1024 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
wrdsp $5, -1 # CHECK: :[[@LINE]]:13: error: expected 10-bit unsigned immediate
Modified: llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-dsp/invalid.s Wed Jun 7 09:48:46 2017
@@ -1,6 +1,8 @@
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 -mattr=micromips -mattr=+dsp 2>%t1
# RUN: FileCheck %s < %t1
+ repl.ph $2, -513 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
+ repl.ph $2, 512 # CHECK: :[[@LINE]]:15: error: expected 10-bit signed immediate
shll.ph $3, $4, 16 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
shll.ph $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 4-bit unsigned immediate
shll_s.ph $3, $4, 16 # CHECK: :[[@LINE]]:21: error: expected 4-bit unsigned immediate
Modified: llvm/trunk/test/MC/Mips/micromips-dsp/valid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-dsp/valid.s?rev=304918&r1=304917&r2=304918&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-dsp/valid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-dsp/valid.s Wed Jun 7 09:48:46 2017
@@ -95,7 +95,7 @@
mtlo $1, $ac1 # CHECK: mtlo $1, $ac1 # encoding: [0x00,0x01,0x70,0x7c]
raddu.w.qb $1, $2 # CHECK: raddu.w.qb $1, $2 # encoding: [0x00,0x22,0xf1,0x3c]
rddsp $1, 2 # CHECK: rddsp $1, 2 # encoding: [0x00,0x20,0x86,0x7c]
- repl.ph $1, 512 # CHECK: repl.ph $1, 512 # encoding: [0x02,0x00,0x08,0x3d]
+ repl.ph $1, 2 # CHECK: repl.ph $1, 2 # encoding: [0x00,0x02,0x08,0x3d]
repl.qb $1, 128 # CHECK: repl.qb $1, 128 # encoding: [0x00,0x30,0x05,0xfc]
replv.ph $1, $2 # CHECK: replv.ph $1, $2 # encoding: [0x00,0x22,0x03,0x3c]
replv.qb $1, $2 # CHECK: replv.qb $1, $2 # encoding: [0x00,0x22,0x13,0x3c]
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