[PATCH] D33114: [AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.

[Mark Searles via Phabricator via llvm-commits]

msearles added inline comments.


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Comment at: lib/Target/AMDGPU/DSInstructions.td:442
+let Uses = [EXEC], mayLoad = 1, mayStore = 0, isConvergent = 1 in {
 def DS_SWIZZLE_B32 : DS_1A_RET <"ds_swizzle_b32">;
 }
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tstellar wrote:
> rampitec wrote:
> > I'm not really sure mayLoad is a correct flag here.
> The LGKM_CNT flag indicates that the instruction updates the count so you shouldn't need to rely on isLoad.    Look for this comment in the pass:
> 
>   // TODO: Use the (TSFlags & SIInstrFlags::LGKM_CNT) property everywhere.
> 
I will revise.


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Comment at: lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1865
+  if (!MFI->isEntryFunction()) {
+    // Wait for any outstanding memory operations that the input registers may
+    // depend on. We can't track them and it's better to to the wait after the
----------------
rampitec wrote:
> We do not have call support, how this code is triggered?
Code is triggered by 3 LIT tests, which were recently added by Matt Arsenault:
LLVM :: CodeGen/AMDGPU/frame-index-elimination.ll
LLVM :: CodeGen/AMDGPU/function-args.ll
LLVM :: CodeGen/AMDGPU/function-returns.ll

I'm porting the fixes he put inplace within the old wait pass into the new to keep them in step with one another.



https://reviews.llvm.org/D33114